From patchwork Wed Dec 5 08:36:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 10713217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 60D7517DB for ; Wed, 5 Dec 2018 08:38:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 515732B73A for ; Wed, 5 Dec 2018 08:38:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 45C972C3E3; Wed, 5 Dec 2018 08:38:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E17BD2B73A for ; Wed, 5 Dec 2018 08:38:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B9E4A6E381; Wed, 5 Dec 2018 08:38:04 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.bootlin.com (mail.bootlin.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 1094A6E377 for ; Wed, 5 Dec 2018 08:37:57 +0000 (UTC) Received: by mail.bootlin.com (Postfix, from userid 110) id DCFAB20E95; Wed, 5 Dec 2018 09:37:55 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-79-44.w90-88.abo.wanadoo.fr [90.88.21.44]) by mail.bootlin.com (Postfix) with ESMTPSA id 5FF6C20A66; Wed, 5 Dec 2018 09:37:28 +0100 (CET) From: Paul Kocialkowski To: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 13/22] drm/sun4i: Add buffer stride and offset configuration for tiling mode Date: Wed, 5 Dec 2018 09:36:54 +0100 Message-Id: <20181205083703.21488-14-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181205083703.21488-1-paul.kocialkowski@bootlin.com> References: <20181205083703.21488-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , linux-sunxi@googlegroups.com, Paul Kocialkowski , David Airlie , Chen-Yu Tsai , Thomas Petazzoni , Sean Paul Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This introduces stride and offset configuration for the VPU tiling mode. Stride is calculated differently than it is for linear formats and an offset is calculated, for which new register definitions are introduced. Signed-off-by: Paul Kocialkowski Acked-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 49 ++++++++++++++++++++++++-- drivers/gpu/drm/sun4i/sun4i_frontend.h | 19 ++++++++++ 2 files changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index e950370792ce..6ede40aab515 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -126,21 +126,64 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; + unsigned int strides[3] = {}; + dma_addr_t paddr; bool swap; + if (fb->modifier == DRM_FORMAT_MOD_ALLWINNER_TILED) { + unsigned int width = state->src_w >> 16; + unsigned int offset; + + strides[0] = SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[0]); + + /* + * The X1 offset is the offset to the bottom-right point in the + * end tile, which is the final pixel (at offset width - 1) + * within the end tile (with a 32-byte mask). + */ + offset = (width - 1) & (32 - 1); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + + if (fb->format->num_planes > 1) { + strides[1] = + SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[1]); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + } + + if (fb->format->num_planes > 2) { + strides[2] = + SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[2]); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + } + } else { + strides[0] = fb->pitches[0]; + + if (fb->format->num_planes > 1) + strides[1] = fb->pitches[1]; + + if (fb->format->num_planes > 2) + strides[2] = fb->pitches[2]; + } + /* Set the line width */ DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]); regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, - fb->pitches[0]); + strides[0]); if (fb->format->num_planes > 1) regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG, - fb->pitches[1]); + strides[1]); if (fb->format->num_planes > 2) regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG, - fb->pitches[2]); + strides[2]); /* Some planar formats require chroma channel swapping by hand. */ swap = sun4i_frontend_format_chroma_requires_swap(fb->format->format); diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 6c4d7797bb8a..235109199b9d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -25,10 +25,29 @@ #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024 #define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028 +#define SUN4I_FRONTEND_TB_OFF0_REG 0x030 +#define SUN4I_FRONTEND_TB_OFF1_REG 0x034 +#define SUN4I_FRONTEND_TB_OFF2_REG 0x038 +#define SUN4I_FRONTEND_TB_OFF_X1(x1) ((x1) << 16) +#define SUN4I_FRONTEND_TB_OFF_Y0(y0) ((y0) << 8) +#define SUN4I_FRONTEND_TB_OFF_X0(x0) (x0) + #define SUN4I_FRONTEND_LINESTRD0_REG 0x040 #define SUN4I_FRONTEND_LINESTRD1_REG 0x044 #define SUN4I_FRONTEND_LINESTRD2_REG 0x048 +/* + * In tiled mode, the stride is defined as the distance between the start of the + * end line of the current tile and the start of the first line in the next + * vertical tile. + * + * Tiles are represented in row-major order, thus the end line of current tile + * starts at: 31 * 32 (31 lines of 32 cols), the next vertical tile starts at: + * 32-bit-aligned-width * 32 and the distance is: + * 32 * (32-bit-aligned-width - 31). + */ +#define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32) + #define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8)