diff mbox series

[7/9] drm/msm: mdp5: Remove alpha from plane state

Message ID 20181205162958.25025-7-sean@poorly.run (mailing list archive)
State New, archived
Headers show
Series [1/9] drm/msm: Don't track crtcs in msm private struct | expand

Commit Message

Sean Paul Dec. 5, 2018, 4:29 p.m. UTC 
From: Sean Paul <seanpaul@chromium.org>

It's always 0xFF, so remove it and any code that relies on it being
!= 0xFF.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c  | 27 ++++++----------------
 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h   |  1 -
 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c |  4 ----
 drivers/gpu/drm/msm/msm_drv.h              |  1 -
 4 files changed, 7 insertions(+), 26 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
index 035be33405f08..bfa97ec063965 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
@@ -230,7 +230,7 @@  static void blend_setup(struct drm_crtc *crtc)
 	struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer;
 	uint32_t r_lm = r_mixer ? r_mixer->lm : 0;
 	struct mdp5_ctl *ctl = mdp5_cstate->ctl;
-	uint32_t blend_op, fg_alpha, bg_alpha, ctl_blend_flags = 0;
+	uint32_t blend_op, ctl_blend_flags = 0;
 	unsigned long flags;
 	enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } };
 	enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } };
@@ -300,44 +300,31 @@  static void blend_setup(struct drm_crtc *crtc)
 		plane = pstates[i]->base.plane;
 		blend_op = MDP5_LM_BLEND_OP_MODE_FG_ALPHA(FG_CONST) |
 			MDP5_LM_BLEND_OP_MODE_BG_ALPHA(BG_CONST);
-		fg_alpha = pstates[i]->alpha;
-		bg_alpha = 0xFF - pstates[i]->alpha;
 
 		if (!format->alpha_enable && bg_alpha_enabled)
 			mixer_op_mode = 0;
 		else
 			mixer_op_mode |= mdp5_lm_use_fg_alpha_mask(i);
 
-		DBG("Stage %d fg_alpha %x bg_alpha %x", i, fg_alpha, bg_alpha);
-
 		if (format->alpha_enable) {
 			blend_op = MDP5_LM_BLEND_OP_MODE_FG_ALPHA(FG_PIXEL) |
-				MDP5_LM_BLEND_OP_MODE_BG_ALPHA(FG_PIXEL);
-			if (fg_alpha != 0xff) {
-				bg_alpha = fg_alpha;
-				blend_op |=
-				       MDP5_LM_BLEND_OP_MODE_FG_MOD_ALPHA |
-				       MDP5_LM_BLEND_OP_MODE_FG_INV_MOD_ALPHA |
-				       MDP5_LM_BLEND_OP_MODE_BG_MOD_ALPHA |
-				       MDP5_LM_BLEND_OP_MODE_BG_INV_MOD_ALPHA;
-			} else {
-				blend_op |= MDP5_LM_BLEND_OP_MODE_BG_INV_ALPHA;
-			}
+				MDP5_LM_BLEND_OP_MODE_BG_ALPHA(FG_PIXEL) |
+				MDP5_LM_BLEND_OP_MODE_BG_INV_ALPHA;
 		}
 
 		mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(lm,
 				blender(i)), blend_op);
 		mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(lm,
-				blender(i)), fg_alpha);
+				blender(i)), 0xFF);
 		mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(lm,
-				blender(i)), bg_alpha);
+				blender(i)), 0);
 		if (r_mixer) {
 			mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(r_lm,
 					blender(i)), blend_op);
 			mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(r_lm,
-					blender(i)), fg_alpha);
+					blender(i)), 0xFF);
 			mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(r_lm,
-					blender(i)), bg_alpha);
+					blender(i)), 0);
 		}
 	}
 
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
index 61b3331dcab9c..8605a7dee44c1 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
@@ -109,7 +109,6 @@  struct mdp5_plane_state {
 
 	/* aligned with property */
 	uint8_t zpos;
-	uint8_t alpha;
 
 	/* assigned by crtc blender */
 	enum mdp_mixer_stage_id stage;
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
index e96aff8e55757..5ea06804cef2b 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
@@ -175,7 +175,6 @@  mdp5_plane_atomic_print_state(struct drm_printer *p,
 			   pstate->r_hwpipe ? pstate->r_hwpipe->name :
 					      "(null)");
 	drm_printf(p, "\tzpos=%u\n", pstate->zpos);
-	drm_printf(p, "\talpha=%u\n", pstate->alpha);
 	drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage));
 }
 
@@ -189,9 +188,6 @@  static void mdp5_plane_reset(struct drm_plane *plane)
 	kfree(to_mdp5_plane_state(plane->state));
 	mdp5_state = kzalloc(sizeof(*mdp5_state), GFP_KERNEL);
 
-	/* assign default blend parameters */
-	mdp5_state->alpha = 255;
-
 	if (plane->type == DRM_PLANE_TYPE_PRIMARY)
 		mdp5_state->zpos = STAGE_BASE;
 	else
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index b6aa04511ded9..a578bad540130 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -72,7 +72,6 @@  struct msm_file_private {
 
 enum msm_mdp_plane_property {
 	PLANE_PROP_ZPOS,
-	PLANE_PROP_ALPHA,
 	PLANE_PROP_MAX_NUM
 };