From patchwork Fri Dec 14 18:29:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10731569 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0799513BF for ; Fri, 14 Dec 2018 18:29:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 297F52D917 for ; Fri, 14 Dec 2018 18:29:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1DD702D91E; Fri, 14 Dec 2018 18:29:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C5A7C2D917 for ; Fri, 14 Dec 2018 18:29:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F8216F64F; Fri, 14 Dec 2018 18:29:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id DC4E96F64D; Fri, 14 Dec 2018 18:29:38 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Dec 2018 10:29:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,354,1539673200"; d="scan'208";a="118887362" Received: from mdroper-desk.fm.intel.com ([10.105.128.10]) by orsmga001.jf.intel.com with ESMTP; 14 Dec 2018 10:29:38 -0800 From: Matt Roper To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH v3 2/2] drm/i915: Validate userspace-provided color management LUT's (v3) Date: Fri, 14 Dec 2018 10:29:32 -0800 Message-Id: <20181214182932.32727-3-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20181214182932.32727-1-matthew.d.roper@intel.com> References: <20181214182932.32727-1-matthew.d.roper@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Uma Shankar , Swati Sharma MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP We currently program userspace-provided gamma and degamma LUT's into our hardware without really checking to see whether they satisfy our hardware's rules. We should try to catch tables that are invalid for our hardware early and reject the atomic transaction. All of our platforms that accept a degamma LUT expect that the entries in the LUT are always flat or increasing, never decreasing. Also, our GLK and ICL platforms only accept degamma tables with r=g=b entries; so we should also add the relevant checks for that in anticipation of degamma support landing for those platforms. v2: - Use new API (single check function with bitmask of tests to apply) - Call helper for our gamma table as well (with no additional tests specified) so that the table size will be validated. v3: - Don't call on the gamma table since the LUT size is already tested at property blob upload and we don't have any additional hardware constraints for that LUT. Cc: Uma Shankar Cc: Swati Sharma Signed-off-by: Matt Roper Reviewed-By: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index 37fd9ddf762e..6c5d030236b9 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -609,10 +609,26 @@ int intel_color_check(struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); size_t gamma_length, degamma_length; + uint32_t tests = DRM_COLOR_LUT_INCREASING; degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size; + /* + * All of our platforms mandate that the degamma curve be + * non-decreasing. Additionally, GLK and gen11 only accept a single + * value for red, green, and blue in the degamma table. Make sure + * userspace didn't try to pass us something we can't handle. + * + * We don't have any extra hardware constraints on the gamma table, + * so no need to explicitly check it. + */ + if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 11) + tests |= DRM_COLOR_LUT_EQUAL_CHANNELS; + + if (drm_color_lut_check(crtc_state->base.degamma_lut, tests) != 0) + return -EINVAL; + /* * We allow both degamma & gamma luts at the right size or * NULL.