| Message ID | 20190111222721.246972-1-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm: Fix A6XX support for opp-level | expand |
On Fri, Jan 11, 2019 at 02:27:21PM -0800, Douglas Anderson wrote: > The bindings for Qualcomm opp levels changed after being Acked but > before landing. Thus the code in the GPU that was relying on the old > bindings is now broken. > > While we could just change the string 'qcom,level' to the string > 'opp-level', it actually seems better to use the newly-introduced > dev_pm_opp_get_level(). > > This patch thus has a hard dependency on the outstanding patch ("OPP: > Add support for parsing the 'opp-level' property") and will need to > land in a tree that contains that patch. > > This patch needs to land before the patch ("arm64: dts: sdm845: Add > gpu and gmu device nodes") since if a tree contains the device tree > patch but not this one you'll get a crash at bootup. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> > --- > > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 17 ++++++----------- > 1 file changed, 6 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > index 5beb83d1cf87..900f18dc1577 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > @@ -928,25 +928,20 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) > } > > /* Return the 'arc-level' for the given frequency */ > -static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) > +static unsigned int a6xx_gmu_get_arc_level(struct device *dev, > + unsigned long freq) > { > struct dev_pm_opp *opp; > - struct device_node *np; > - u32 val = 0; > + unsigned int val; > > if (!freq) > return 0; > > - opp = dev_pm_opp_find_freq_exact(dev, freq, true); > + opp = dev_pm_opp_find_freq_exact(dev, freq, true); > if (IS_ERR(opp)) > return 0; > > - np = dev_pm_opp_get_of_node(opp); > - > - if (np) { > - of_property_read_u32(np, "qcom,level", &val); > - of_node_put(np); > - } > + val = dev_pm_opp_get_level(opp); > > dev_pm_opp_put(opp); > > @@ -982,7 +977,7 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes, > /* Construct a vote for each frequency */ > for (i = 0; i < freqs_count; i++) { > u8 pindex = 0, sindex = 0; > - u32 level = a6xx_gmu_get_arc_level(dev, freqs[i]); > + unsigned int level = a6xx_gmu_get_arc_level(dev, freqs[i]); > > /* Get the primary index that matches the arc level */ > for (j = 0; j < pri_count; j++) { > -- > 2.20.1.97.g81188d93c3-goog >
Hi Douglas,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robclark/msm-next]
[also build test ERROR on v5.0-rc1 next-20190111]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Douglas-Anderson/drm-msm-Fix-A6XX-support-for-opp-level/20190114-004951
base: git://people.freedesktop.org/~robclark/linux msm-next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
drivers/gpu/drm/msm/adreno/a6xx_gmu.c: In function 'a6xx_gmu_get_arc_level':
>> drivers/gpu/drm/msm/adreno/a6xx_gmu.c:964:8: error: implicit declaration of function 'dev_pm_opp_get_level'; did you mean 'dev_pm_opp_get_freq'? [-Werror=implicit-function-declaration]
val = dev_pm_opp_get_level(opp);
^~~~~~~~~~~~~~~~~~~~
dev_pm_opp_get_freq
cc1: some warnings being treated as errors
vim +964 drivers/gpu/drm/msm/adreno/a6xx_gmu.c
949
950 /* Return the 'arc-level' for the given frequency */
951 static unsigned int a6xx_gmu_get_arc_level(struct device *dev,
952 unsigned long freq)
953 {
954 struct dev_pm_opp *opp;
955 unsigned int val;
956
957 if (!freq)
958 return 0;
959
960 opp = dev_pm_opp_find_freq_exact(dev, freq, true);
961 if (IS_ERR(opp))
962 return 0;
963
> 964 val = dev_pm_opp_get_level(opp);
965
966 dev_pm_opp_put(opp);
967
968 return val;
969 }
970
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5beb83d1cf87..900f18dc1577 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -928,25 +928,20 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) } /* Return the 'arc-level' for the given frequency */ -static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) +static unsigned int a6xx_gmu_get_arc_level(struct device *dev, + unsigned long freq) { struct dev_pm_opp *opp; - struct device_node *np; - u32 val = 0; + unsigned int val; if (!freq) return 0; - opp = dev_pm_opp_find_freq_exact(dev, freq, true); + opp = dev_pm_opp_find_freq_exact(dev, freq, true); if (IS_ERR(opp)) return 0; - np = dev_pm_opp_get_of_node(opp); - - if (np) { - of_property_read_u32(np, "qcom,level", &val); - of_node_put(np); - } + val = dev_pm_opp_get_level(opp); dev_pm_opp_put(opp); @@ -982,7 +977,7 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes, /* Construct a vote for each frequency */ for (i = 0; i < freqs_count; i++) { u8 pindex = 0, sindex = 0; - u32 level = a6xx_gmu_get_arc_level(dev, freqs[i]); + unsigned int level = a6xx_gmu_get_arc_level(dev, freqs[i]); /* Get the primary index that matches the arc level */ for (j = 0; j < pri_count; j++) {
The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU that was relying on the old bindings is now broken. While we could just change the string 'qcom,level' to the string 'opp-level', it actually seems better to use the newly-introduced dev_pm_opp_get_level(). This patch thus has a hard dependency on the outstanding patch ("OPP: Add support for parsing the 'opp-level' property") and will need to land in a tree that contains that patch. This patch needs to land before the patch ("arm64: dts: sdm845: Add gpu and gmu device nodes") since if a tree contains the device tree patch but not this one you'll get a crash at bootup. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-)