From patchwork Wed Jan 16 18:46:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 10766805 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A24E186E for ; Wed, 16 Jan 2019 18:46:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1BDCB2EBD3 for ; Wed, 16 Jan 2019 18:46:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0FEE12EBDC; Wed, 16 Jan 2019 18:46:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AA9AD2EBBC for ; Wed, 16 Jan 2019 18:46:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 62A1A6F1C7; Wed, 16 Jan 2019 18:46:34 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B5C56F1C7 for ; Wed, 16 Jan 2019 18:46:33 +0000 (UTC) Received: by mail-pg1-x544.google.com with SMTP id d72so3200404pga.9 for ; Wed, 16 Jan 2019 10:46:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=RnFz/AG+HRuZACi2rZk82YB8mLxedD5PZQoVniGXyfQ=; b=bYnEQ+ffJ2DpoiB7aIEvpSHl8UFke4OSKMFu6dRsZAFp6M7O3sst+EzNvBs5okfzH2 jxTnZl0QYTFslbZDN5ecky0fZTl7BVvySQsYJFjFtkNE8CvUtBAmi3UfMDJp1F0+TU+2 gZhnsNqP/uMGbb7dHsLLSzx/rTqmrBHmYUm+iDgfePv+tYDGpQZK+112kqSC/Y8VjYkg yaoz6JINbpUXGEu3qw7EpImv1EmYRJfDy60SbLj59O/8+u7I+86f6ED+jUM4MXKtHP1Y BI+EWka1q/8qpFk8y+oj+kR02m0p77PKIAdEYVQ/Oy6h0wGmFCip+fJXdBkawRfZR2ON QzJQ== X-Gm-Message-State: AJcUukfAPI1NTeyAu8j1EYa+exIM5mQ/y8VHFwYydhwpD5Qruglosq0q NSnnzZ/k34JGBd2NDxSBe5sfAg== X-Google-Smtp-Source: ALg8bN6sk5vEhpdPSkL5GIHaDDxV74Y2fGlWV8HtFkHeIwjDzuKGA9g7AvvUpzvHS4DHPKc1nEBELg== X-Received: by 2002:a63:f444:: with SMTP id p4mr10122599pgk.124.1547664392958; Wed, 16 Jan 2019 10:46:32 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:c8e0:70d7:4be7:a36]) by smtp.gmail.com with ESMTPSA id k186sm8138902pge.13.2019.01.16.10.46.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Jan 2019 10:46:32 -0800 (PST) From: Douglas Anderson To: Rob Clark , Jordan Crouse Subject: [PATCH v2 1/2] drm/msm: Fix A6XX support for opp-level Date: Wed, 16 Jan 2019 10:46:21 -0800 Message-Id: <20190116184623.77136-1-dianders@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rajendra Nayak , David Airlie , linux-arm-msm@vger.kernel.org, Sharat Masetty , Douglas Anderson , dri-devel@lists.freedesktop.org, Stephen Boyd , Mamta Shukla , Viresh Kumar , Andy Gross , Colin Ian King , "Kristian H . Kristensen" , Bjorn Andersson , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU driver that was relying on the old bindings is now broken. Let's change the code to match the new bindings by adjusting the old string 'qcom,level' to the new string 'opp-level'. See the patch ("dt-bindings: opp: Introduce opp-level bindings"). NOTE: we will do additional cleanup to totally remove the string from the code and use the new dev_pm_opp_get_level() but we'll do it in a future patch. This will facilitate getting the important code fix in sooner without having to deal with cross-maintainer dependencies. This patch needs to land before the patch ("arm64: dts: sdm845: Add gpu and gmu device nodes") since if a tree contains the device tree patch but not this one you'll get a crash at bootup. Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support") Signed-off-by: Douglas Anderson Reviewed-by: Jordan Crouse --- Changes in v2: - Split into two patches to facilitate landing. drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5beb83d1cf87..ce1b3cc4bf6d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -944,7 +944,7 @@ static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) np = dev_pm_opp_get_of_node(opp); if (np) { - of_property_read_u32(np, "qcom,level", &val); + of_property_read_u32(np, "opp-level", &val); of_node_put(np); }