@@ -62,10 +62,26 @@
};
};
+&be0 {
+ compatible = "allwinner,sun8i-a23-display-backend";
+};
+
&ccu {
compatible = "allwinner,sun8i-a23-ccu";
};
+&de {
+ compatible = "allwinner,sun8i-a23-display-engine";
+};
+
+&drc0 {
+ compatible = "allwinner,sun8i-a23-drc";
+};
+
+&fe0 {
+ compatible = "allwinner,sun8i-a23-display-frontend";
+};
+
&pio {
compatible = "allwinner,sun8i-a23-pinctrl";
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
@@ -73,6 +89,10 @@
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
};
+&tcon0 {
+ compatible = "allwinner,sun8i-a23-tcon";
+};
+
&usb_otg {
compatible = "allwinner,sun6i-a31-musb";
};
Now that the compatible strings for the display pipeline on the A23 have been added to the bindings, add the corresponding compatibles to the device nodes already in the A23/A33 shared dtsi. While the A23 has the TCON ch1 clock defined in the CCU, and the channel 1 registers are available, it does not have any means to use channel 1 due to a lack of downstream encoders, and the enable bit for channel 1 is hard-wired to 0 (off). Hence the ch1 clock is left out. As the MIPI DSI output device is not officially documented, and there are no reference devices to test it, it is not covered by this patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sun8i-a23.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)