Message ID | 20190129133535.3705-1-thellstrom@vmware.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] drm/vmwgfx: Fix setting of dma masks | expand |
For the series Reviewed-by: Deepak Rawat <drawat@vmware.com> On Tue, 2019-01-29 at 14:35 +0100, Thomas Hellstrom wrote: > Previously we set only the dma mask and not the coherent mask. Fix > that. > Also, for clarity, make sure both are initially set to 64 bits. > > Fixes: 0d00c488f3de: ("drm/vmwgfx: Fix the driver for large dma > addresses") > Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> > --- > drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c > b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c > index 3e2bcff34032..ae9df4432bfc 100644 > --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c > +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c > @@ -600,13 +600,16 @@ static int vmw_dma_select_mode(struct > vmw_private *dev_priv) > static int vmw_dma_masks(struct vmw_private *dev_priv) > { > struct drm_device *dev = dev_priv->dev; > + int ret = 0; > > - if (intel_iommu_enabled && > + ret = dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)); > + if (dev_priv->map_mode != vmw_dma_phys && > (sizeof(unsigned long) == 4 || vmw_restrict_dma_mask)) { > DRM_INFO("Restricting DMA addresses to 44 bits.\n"); > - return dma_set_mask(dev->dev, DMA_BIT_MASK(44)); > + return dma_set_mask_and_coherent(dev->dev, > DMA_BIT_MASK(44)); > } > - return 0; > + > + return ret; > } > > static int vmw_driver_load(struct drm_device *dev, unsigned long > chipset)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 3e2bcff34032..ae9df4432bfc 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -600,13 +600,16 @@ static int vmw_dma_select_mode(struct vmw_private *dev_priv) static int vmw_dma_masks(struct vmw_private *dev_priv) { struct drm_device *dev = dev_priv->dev; + int ret = 0; - if (intel_iommu_enabled && + ret = dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)); + if (dev_priv->map_mode != vmw_dma_phys && (sizeof(unsigned long) == 4 || vmw_restrict_dma_mask)) { DRM_INFO("Restricting DMA addresses to 44 bits.\n"); - return dma_set_mask(dev->dev, DMA_BIT_MASK(44)); + return dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(44)); } - return 0; + + return ret; } static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
Previously we set only the dma mask and not the coherent mask. Fix that. Also, for clarity, make sure both are initially set to 64 bits. Fixes: 0d00c488f3de: ("drm/vmwgfx: Fix the driver for large dma addresses") Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> --- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)