| Message ID | 20190328171710.31949-5-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panel: simple: Add mode support to devicetree | expand |
Am Donnerstag, 28. März 2019, 18:17:07 CET schrieb Douglas Anderson: > Convert the Innolux n116bge from using a fixed mode to specifying a > display timing with min/typ/max values. > > Note that the n116bge's datasheet doesn't fit too well into DRM's way > of specifying things. Specifically the panel's datasheet just > specifies the vertical blanking period and horizontal blanking period > and doesn't break things out. For now we'll leave everything as a > fixed value but just allow adjusting the pixel clock. I've added a > comment on what the datasheet claims so someone could later expand > things to fit their needs if they wanted to test other blanking > periods. > > The goal here is to be able to specify the panel timings in the device > tree for several rk3288 Chromebooks (like rk3288-veryon-jerry). These > Chromebooks have all been running in the downstream kernel with the > standard porches and sync lengths but just with a slightly slower > pixel clock because the 76.42 MHz clock is not achievable from the > fixed PLL that was available. These Chromebooks only achieve a > refresh rate of ~58 Hz. While it's probable that we could adjust the > timings to achieve 60 Hz it's probably wisest to match what's been > running on these devices all these years. > > I'll note that though the upstream kernel has always tried to achieve > 76.42 MHz, it has actually been running at 74.25 MHz also since the > video processor is parented off the same fixed PLL. > > Changes in v4: > - display_timing for Innolux n116bge new for v4. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> on a rk3288-jerry and rk3288-pinky Tested-by: Heiko Stuebner <heiko@sntech.de>
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ad4f4aac2d44..7d407fab3628 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1550,23 +1550,32 @@ static const struct panel_desc innolux_g121x1_l03 = { }, }; -static const struct drm_display_mode innolux_n116bge_mode = { - .clock = 76420, - .hdisplay = 1366, - .hsync_start = 1366 + 136, - .hsync_end = 1366 + 136 + 30, - .htotal = 1366 + 136 + 30 + 60, - .vdisplay = 768, - .vsync_start = 768 + 8, - .vsync_end = 768 + 8 + 12, - .vtotal = 768 + 8 + 12 + 12, - .vrefresh = 60, - .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +/* + * Datasheet specifies that at 60 Hz refresh rate: + * - total horizontal time: { 1506, 1592, 1716 } + * - total vertical time: { 788, 800, 868 } + * + * ...but doesn't go into exactly how that should be split into a front + * porch, back porch, or sync length. For now we'll leave a single setting + * here which allows a bit of tweaking of the pixel clock at the expense of + * refresh rate. + */ +static const struct display_timing innolux_n116bge_timing = { + .pixelclock = { 72600000, 76420000, 80240000 }, + .hactive = { 1366, 1366, 1366 }, + .hfront_porch = { 136, 136, 136 }, + .hback_porch = { 60, 60, 60 }, + .hsync_len = { 30, 30, 30 }, + .vactive = { 768, 768, 768 }, + .vfront_porch = { 8, 8, 8 }, + .vback_porch = { 12, 12, 12 }, + .vsync_len = { 12, 12, 12 }, + .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, }; static const struct panel_desc innolux_n116bge = { - .modes = &innolux_n116bge_mode, - .num_modes = 1, + .timings = &innolux_n116bge_timing, + .num_timings = 1, .bpc = 6, .size = { .width = 256,
Convert the Innolux n116bge from using a fixed mode to specifying a display timing with min/typ/max values. Note that the n116bge's datasheet doesn't fit too well into DRM's way of specifying things. Specifically the panel's datasheet just specifies the vertical blanking period and horizontal blanking period and doesn't break things out. For now we'll leave everything as a fixed value but just allow adjusting the pixel clock. I've added a comment on what the datasheet claims so someone could later expand things to fit their needs if they wanted to test other blanking periods. The goal here is to be able to specify the panel timings in the device tree for several rk3288 Chromebooks (like rk3288-veryon-jerry). These Chromebooks have all been running in the downstream kernel with the standard porches and sync lengths but just with a slightly slower pixel clock because the 76.42 MHz clock is not achievable from the fixed PLL that was available. These Chromebooks only achieve a refresh rate of ~58 Hz. While it's probable that we could adjust the timings to achieve 60 Hz it's probably wisest to match what's been running on these devices all these years. I'll note that though the upstream kernel has always tried to achieve 76.42 MHz, it has actually been running at 74.25 MHz also since the video processor is parented off the same fixed PLL. Changes in v4: - display_timing for Innolux n116bge new for v4. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/gpu/drm/panel/panel-simple.c | 37 +++++++++++++++++----------- 1 file changed, 23 insertions(+), 14 deletions(-)