From patchwork Fri Mar 29 12:00:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Kleiner X-Patchwork-Id: 10876945 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B21DF922 for ; Fri, 29 Mar 2019 12:02:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D8F528A7C for ; Fri, 29 Mar 2019 12:02:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9170F28F81; Fri, 29 Mar 2019 12:02:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2DE2628A7C for ; Fri, 29 Mar 2019 12:02:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 25F3F6E8DE; Fri, 29 Mar 2019 12:02:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id F049C6E8DA; Fri, 29 Mar 2019 12:02:51 +0000 (UTC) Received: by mail-wr1-f65.google.com with SMTP id k17so2265500wrx.10; Fri, 29 Mar 2019 05:02:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kaeLFU8Aukm4r9xq+O5fI9l/60murMwZB/CjTfrLz3w=; b=cb+3yQN8gMKplrVVRTgl/+dloTm+jo0d6gYvBX3Ontj4cpoXVoVGGcCZ8J3JMKkUbb snisRCAScteUD6oMKfLdRB29hkxMvJ2oixIeY27pYn8Qp2nDH6Kdddyr389SW8XZCUvL hRsYKz9vGWqPLyAcPaSn0Q44LFaKOCtH1ugmjmChYoelXgzMuv44KpQjBgygBuxzbn9v mbjJ3EeS70NjK/cVZfKO4B/ln4+pKwJYBUuzaMl1OFxZ4wWQOpmFLWq+k/PZ1DMmonB/ hBdj9kYmxWSFCyHvm+5hTWq+FmqreTK0F5DLk/78EZHlcGIa4ZGwvXAHLcgEZ28V2QZX hugg== X-Gm-Message-State: APjAAAVlglZFAJBFBW+KCgisMsCZV4gjmzkWg9NGALcQCwvADR2JVnfZ oaCLi0xgpXboHFrGFDtwUL5yYPMd X-Google-Smtp-Source: APXvYqz8H5QOHEf4pV7ugwBnTh9PVhDzb9CSMcglH8vvsnctYWFN1L5Kf1hXxIfXYX7f+0/cxwTi+g== X-Received: by 2002:a5d:4801:: with SMTP id l1mr30171410wrq.318.1553860910277; Fri, 29 Mar 2019 05:01:50 -0700 (PDT) Received: from twisty.cin.medizin.uni-tuebingen.de ([2a01:c22:d02f:4b00:e9fd:d3f1:412c:598a]) by smtp.gmail.com with ESMTPSA id z8sm1839358wrh.80.2019.03.29.05.01.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Mar 2019 05:01:49 -0700 (PDT) From: Mario Kleiner To: amd-gfx@lists.freedesktop.org Subject: [PATCH 3/5] drm/amd/display: Rework vrr flip throttling for late vblank irq. Date: Fri, 29 Mar 2019 13:00:55 +0100 Message-Id: <20190329120057.1472-4-mario.kleiner.de@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190329120057.1472-1-mario.kleiner.de@gmail.com> References: <20190329120057.1472-1-mario.kleiner.de@gmail.com> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kaeLFU8Aukm4r9xq+O5fI9l/60murMwZB/CjTfrLz3w=; b=OzARQBb1Q9ve8O+Xh8eJiZ0TBmcvuc+FWpkeyol4KbYKDqReIr0obdnrRMIJz1FYYc Z6pkROGTxg4lWT+r2NMP9fJ4u49BUJJHjpVo+hN7ll/6OMW1hvICCd/tctNxSjzWJB+6 5uGuPCXGCJXEyUEhYFN/TmNNKtelytLqOACATOhVHbuUs5ISQd+zxYfrfdkc5C1VP7Fr FBrxYCigt1zaJncekjeJlo+H+8TtTc8l+I6IEdC19CSmqRJ6r3OOlLAKEVZpXUP/owEP RNjt9JwmkXwPkBjMPaP78RMfg2TD0/kW6QxcNJNeW9eImKI6S4afadMewoK9vYCEAXE3 QgQw== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nicholas.kazlauskas@amd.com, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP For throttling to work correctly, we always need a baseline vblank count last_flip_vblank that increments at start of front-porch. This is the case for drm_crtc_vblank_count() in non-VRR mode, where the vblank irq fires at start of front-porch and triggers DRM core vblank handling, but it is no longer the case in VRR mode, where core vblank handling is done later, after end of front-porch. Therefore drm_crtc_vblank_count() is no longer useful for this. We also can't use drm_crtc_accurate_vblank_count(), as that would screw up vblank timestamps in VRR mode when called in front-porch. To solve this, use the cooked hardware vblank counter returned by amdgpu_get_vblank_counter_kms() instead, as that one is cooked to always increment at start of front-porch, independent of when vblank related irq's fire. This patch allows vblank irq handling to happen anywhere within vblank of even after it, without a negative impact on flip throttling, so followup patches can shift the vblank core handling trigger point wherever they need it. Signed-off-by: Mario Kleiner Reviewed-by: Nicholas Kazlauskas --- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++++++++++-------- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index 889e443eeee7..add238fe4b57 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h @@ -406,7 +406,7 @@ struct amdgpu_crtc { struct amdgpu_flip_work *pflip_works; enum amdgpu_flip_status pflip_status; int deferred_flip_completion; - u64 last_flip_vblank; + u32 last_flip_vblank; /* pll sharing */ struct amdgpu_atom_ss ss; bool ss_enabled; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 6c413bc012af..7366528e5cc2 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -286,7 +286,7 @@ static void dm_pflip_high_irq(void *interrupt_params) } /* Update to correct count(s) if racing with vblank irq */ - amdgpu_crtc->last_flip_vblank = drm_crtc_accurate_vblank_count(&amdgpu_crtc->base); + drm_crtc_accurate_vblank_count(&amdgpu_crtc->base); /* wake up userspace */ if (amdgpu_crtc->event) { @@ -298,6 +298,14 @@ static void dm_pflip_high_irq(void *interrupt_params) } else WARN_ON(1); + /* Keep track of vblank of this flip for flip throttling. We use the + * cooked hw counter, as that one incremented at start of this vblank + * of pageflip completion, so last_flip_vblank is the forbidden count + * for queueing new pageflips if vsync + VRR is enabled. + */ + amdgpu_crtc->last_flip_vblank = amdgpu_get_vblank_counter_kms(adev->ddev, + amdgpu_crtc->crtc_id); + amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE; spin_unlock_irqrestore(&adev->ddev->event_lock, flags); @@ -4789,9 +4797,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, unsigned long flags; struct amdgpu_bo *abo; uint64_t tiling_flags; - uint32_t target, target_vblank; - uint64_t last_flip_vblank; - bool vrr_active = acrtc_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE; + uint32_t target_vblank, last_flip_vblank; + bool vrr_active = amdgpu_dm_vrr_active(acrtc_state); bool pflip_present = false; struct { @@ -4935,7 +4942,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, * clients using the GLX_OML_sync_control extension or * DRI3/Present extension with defined target_msc. */ - last_flip_vblank = drm_crtc_vblank_count(pcrtc); + last_flip_vblank = amdgpu_get_vblank_counter_kms(dm->ddev, acrtc_attach->crtc_id); } else { /* For variable refresh rate mode only: @@ -4951,11 +4958,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags); } - target = (uint32_t)last_flip_vblank + wait_for_vblank; - - /* Prepare wait for target vblank early - before the fence-waits */ - target_vblank = target - (uint32_t)drm_crtc_vblank_count(pcrtc) + - amdgpu_get_vblank_counter_kms(pcrtc->dev, acrtc_attach->crtc_id); + target_vblank = last_flip_vblank + wait_for_vblank; /* * Wait until we're out of the vertical blank period before the one