From patchwork Thu Apr 18 03:51:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Kleiner X-Patchwork-Id: 10906467 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A85AA17E0 for ; Thu, 18 Apr 2019 03:52:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8EA2228BDD for ; Thu, 18 Apr 2019 03:52:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F9C328BE6; Thu, 18 Apr 2019 03:52:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1D16C28BDD for ; Thu, 18 Apr 2019 03:52:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 873126E0C3; Thu, 18 Apr 2019 03:51:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by gabe.freedesktop.org (Postfix) with ESMTPS id 40FA86E0C1; Thu, 18 Apr 2019 03:51:55 +0000 (UTC) Received: by mail-wm1-x344.google.com with SMTP id z6so5962228wmi.0; Wed, 17 Apr 2019 20:51:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Z9wQUpWG+/bXv2aC0gDN2RCc/ZGpiHgI9OyD5oePBNg=; b=hBIZBw9sK9jzCPzJrR3aWSLGn+duFKQsE0p8oOh7MGXOyjMoRAOZNM9NPHn1uY1Tyg Vrt9MaBrfIVYj+ePF89NJlzA9js5QzUmGapUX5/Cvwco0arKN/tj2B/Iq1+RH4lgGNeK c3ICoZpEs/lGbwKIFw6E2P19FFraJy27naJ1UG/Qa8i07ieHDSzWaw4NysJLM5gCLaPO B67bod2yBWhbEMSGVTiUSytfsn/zB2+yGB2OP5FDtqq5g1T7/uOvvwiyHfqLUXPBPWYl keyX+hRi5XClwNedAF0vEAMSYjlYqkVK83rBSlGDOVzOfH2lU33PUJe66GaTZpgGWZH9 oQaw== X-Gm-Message-State: APjAAAXk8AuoruFdla0f7rKaML/O4E9H0a6HEv/uXR85YxJ5AzZHcCe2 nEsWkIDlW0kDGCu/IHmpI3zsYAuh X-Google-Smtp-Source: APXvYqwGqFXZ7+rKNUyy5WHyJ6OaXR21gzVwV6ut3wjN2acxSZrwostAnf5GimpksbQvF7BMfHwAAQ== X-Received: by 2002:a1c:4d12:: with SMTP id o18mr1199779wmh.81.1555559513322; Wed, 17 Apr 2019 20:51:53 -0700 (PDT) Received: from twisty.localdomain ([2a01:c23:7856:4600:55b4:804e:196c:cde9]) by smtp.gmail.com with ESMTPSA id x192sm665054wmf.48.2019.04.17.20.51.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Apr 2019 20:51:52 -0700 (PDT) From: Mario Kleiner To: amd-gfx@lists.freedesktop.org Subject: [PATCH 4/4] drm/amd/display: Compensate for pre-DCE12 BTR-VRR hw limitations. Date: Thu, 18 Apr 2019 05:51:22 +0200 Message-Id: <20190418035122.15791-5-mario.kleiner.de@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190418035122.15791-1-mario.kleiner.de@gmail.com> References: <20190418035122.15791-1-mario.kleiner.de@gmail.com> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z9wQUpWG+/bXv2aC0gDN2RCc/ZGpiHgI9OyD5oePBNg=; b=iTshvKkUrhrNQ9Kwgd4UsSYsgBcwXMH+UB7+nO6i/6MsL5JUC8vC4bzR2Mf73U+WtK ldvhoS8iiIXJGm4wfgHSsGe1yWgP+54zfAimjesybzZsFaFnOhfoSUw7xZW/IettGSEx Oh7F5AShBVTl81anm2M45QFyz3g0YIJAEadVwZ7mUfI464hhPFxLsvOgMFV5vMY8+C49 VjXWZ90CdYApZ1SGNbawxIo+hgKKh7GCpE5hNTJGxuRlZOchXGM/0uvo6rg0gUG7ZwI9 eo2RqeKxZUdEIv6HRWtU0ywC2x8ABTF1oCR7Dk1xfW8+sXay2NJOsRUpdgPeWFt5Eiez kftw== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nicholas.kazlauskas@amd.com, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Pre-DCE12 needs special treatment for BTR / low framerate compensation for more stable behaviour: According to comments in the code and some testing on DCE-8 and DCE-11, DCE-11 and earlier only apply VTOTAL_MIN/MAX programming with a lag of one frame, so the special BTR hw programming for intermediate fixed duration frames must be done inside the current frame at flip submission in atomic commit tail, ie. one vblank earlier, and the fixed refresh intermediate frame mode must be also terminated one vblank earlier on pre-DCE12 display engines. To achieve proper termination on < DCE-12 shift the point when the switch-back from fixed vblank duration to variable vblank duration happens from the start of VBLANK (vblank irq, as done on DCE-12+) to back-porch or end of VBLANK (handled by vupdate irq handler). We must leave the switch-back code inside VBLANK irq for DCE12+, as before. Doing this, we get much better behaviour of BTR for up-sweeps, ie. going from short to long frame durations (~high to low fps) and for constant framerate flips, as tested on DCE-8 and DCE-11. Behaviour is still not quite as good as on DCN-1 though. On down-sweeps, going from long to short frame durations (low fps to high fps) < DCE-12 is a little bit improved, although by far not as much as for up-sweeps and constant fps. Signed-off-by: Mario Kleiner --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 ++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 76b6e621793f..9c8c94f82b35 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -364,6 +364,7 @@ static void dm_vupdate_high_irq(void *interrupt_params) struct amdgpu_device *adev = irq_params->adev; struct amdgpu_crtc *acrtc; struct dm_crtc_state *acrtc_state; + unsigned long flags; acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VUPDATE); @@ -381,6 +382,22 @@ static void dm_vupdate_high_irq(void *interrupt_params) */ if (amdgpu_dm_vrr_active(acrtc_state)) drm_crtc_handle_vblank(&acrtc->base); + + if (acrtc_state->stream && adev->family < AMDGPU_FAMILY_AI && + acrtc_state->vrr_params.supported && + acrtc_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE) { + spin_lock_irqsave(&adev->ddev->event_lock, flags); + mod_freesync_handle_v_update( + adev->dm.freesync_module, + acrtc_state->stream, + &acrtc_state->vrr_params); + + dc_stream_adjust_vmin_vmax( + adev->dm.dc, + acrtc_state->stream, + &acrtc_state->vrr_params.adjust); + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); + } } } @@ -390,6 +407,7 @@ static void dm_crtc_high_irq(void *interrupt_params) struct amdgpu_device *adev = irq_params->adev; struct amdgpu_crtc *acrtc; struct dm_crtc_state *acrtc_state; + unsigned long flags; acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VBLANK); @@ -412,9 +430,10 @@ static void dm_crtc_high_irq(void *interrupt_params) */ amdgpu_dm_crtc_handle_crc_irq(&acrtc->base); - if (acrtc_state->stream && + if (acrtc_state->stream && adev->family >= AMDGPU_FAMILY_AI && acrtc_state->vrr_params.supported && acrtc_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE) { + spin_lock_irqsave(&adev->ddev->event_lock, flags); mod_freesync_handle_v_update( adev->dm.freesync_module, acrtc_state->stream, @@ -424,6 +443,7 @@ static void dm_crtc_high_irq(void *interrupt_params) adev->dm.dc, acrtc_state->stream, &acrtc_state->vrr_params.adjust); + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); } } } @@ -4880,6 +4900,8 @@ static void update_freesync_state_on_stream( { struct mod_vrr_params vrr_params = new_crtc_state->vrr_params; struct dc_info_packet vrr_infopacket = {0}; + struct amdgpu_device *adev = dm->adev; + unsigned long flags; if (!new_stream) return; @@ -4899,6 +4921,14 @@ static void update_freesync_state_on_stream( new_stream, flip_timestamp_in_us, &vrr_params); + + if (adev->family < AMDGPU_FAMILY_AI && + amdgpu_dm_vrr_active(new_crtc_state)) { + spin_lock_irqsave(&adev->ddev->event_lock, flags); + mod_freesync_handle_v_update(dm->freesync_module, + new_stream, &vrr_params); + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); + } } mod_freesync_build_vrr_infopacket(