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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=AV4WCEkh3Y1nXOwyC7oJVUdOizQp0ruTyyAl/1vAOQY=; b=ad3mC2zFSme4H+BtW3gUQ3yvVCxaJQjJ3AMDg+ExoSJvtzNHiMi4MWH+LhBVcxoKbWrkB6Ufs1M1mGtT64VDSyF4cdARb1pq9tx8KGlTz1mQ6GFLAWdaSE8IEelWB2iTRsfB8fYRrDzAiA7NZ+D2SBd9e+VkgoHPA5mjLssSmyc= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian.Koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Chunming Zhou Acked-by: Christian König --- amdgpu/amdgpu.h | 22 ++++++++++++++++++++++ amdgpu/amdgpu_cs.c | 16 ++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index d2480dbe..9d9b0832 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h @@ -1685,6 +1685,28 @@ int amdgpu_cs_syncobj_import_sync_file2(amdgpu_device_handle dev, uint32_t syncobj, uint64_t point, int sync_file_fd); + +/** + * transfer between syncbojs. + * + * \param dev - \c [in] device handle + * \param dst_handle - \c [in] sync object handle + * \param dst_point - \c [in] timeline point, 0 presents dst is binary + * \param src_handle - \c [in] sync object handle + * \param src_point - \c [in] timeline point, 0 presents src is binary + * \param flags - \c [in] flags + * + * \return 0 on success\n + * <0 - Negative POSIX Error code + * + */ +int amdgpu_cs_syncobj_transfer(amdgpu_device_handle dev, + uint32_t dst_handle, + uint64_t dst_point, + uint32_t src_handle, + uint64_t src_point, + uint32_t flags); + /** * Export an amdgpu fence as a handle (syncobj or fd). * diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index daca4421..977fa3cf 100644 --- a/amdgpu/amdgpu_cs.c +++ b/amdgpu/amdgpu_cs.c @@ -817,6 +817,22 @@ out: return ret; } +drm_public int amdgpu_cs_syncobj_transfer(amdgpu_device_handle dev, + uint32_t dst_handle, + uint64_t dst_point, + uint32_t src_handle, + uint64_t src_point, + uint32_t flags) +{ + if (NULL == dev) + return -EINVAL; + + return drmSyncobjTransfer(dev->fd, + dst_handle, dst_point, + src_handle, src_point, + flags); +} + drm_public int amdgpu_cs_submit_raw(amdgpu_device_handle dev, amdgpu_context_handle context, amdgpu_bo_list_handle bo_list_handle,