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[37.60.189.18]) by smtp.gmail.com with ESMTPSA id n63sm3891094wmn.38.2019.05.21.09.11.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 May 2019 09:11:11 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Tomeu Vizoso , Will Deacon , Robin Murphy , Joerg Roedel , Neil Armstrong , Steven Price Subject: [PATCH v6 3/6] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Tue, 21 May 2019 18:10:59 +0200 Message-Id: <20190521161102.29620-4-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521161102.29620-1-peron.clem@gmail.com> References: <20190521161102.29620-1-peron.clem@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 22 May 2019 14:35:24 +0000 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=DfdW1XdDhItosbvciVXVrDVugIjIifv3cMUMU94Jp8X2FK0ZQxxAZxbv2Qn6Fn5cQw 49oQd6X322hDf8QS0nhTjEWv5J8P0acGtDtNKgQZuxIKRTV9u11Hl+bRwOWopyqopQ+Y Lonri78CM6AFUOHPJRHIFr/dOLafFuQxH2L5XPIYZqgW3eN7bPO9qFdCmfynZBpAgiLx Xqs7gEgHeQrAWN7IkS+ExBahYnEL7Dy2Cq0ITBOFdyerMgXruyGZs3ON566JrInM7H17 YfImRCPSTYENl1tnCSf11UodIQ3LinQlSKeR8WR7i6XeC618r8r7hUfdpgHQDMKqPUrG VkoQ== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= , linux-arm-kernel@lists.infradead.org, Icenowy Zheng Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Icenowy Zheng Some SoCs adds a bus clock gate to the Mali Midgard GPU. Add the binding for the bus clock. Signed-off-by: Icenowy Zheng Signed-off-by: Clément Péron Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 1b1a74129141..2e8bbce35695 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -31,6 +31,12 @@ Optional properties: - clocks : Phandle to clock for the Mali Midgard device. +- clock-names : Specify the names of the clocks specified in clocks + when multiple clocks are present. + * core: clock driving the GPU itself (When only one clock is present, + assume it's this clock.) + * bus: bus clock for the GPU + - mali-supply : Phandle to regulator for the Mali device. Refer to Documentation/devicetree/bindings/regulator/regulator.txt for details.