From patchwork Tue Jul 30 00:32:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Welty, Brian" X-Patchwork-Id: 11064679 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B8BB21398 for ; Tue, 30 Jul 2019 00:32:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AA291204FF for ; Tue, 30 Jul 2019 00:32:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9E31328699; Tue, 30 Jul 2019 00:32:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 67B21204FF for ; Tue, 30 Jul 2019 00:32:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0970B6E2E4; Tue, 30 Jul 2019 00:32:14 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 62BB789E57; Tue, 30 Jul 2019 00:32:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 17:32:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,324,1559545200"; d="scan'208";a="371322812" Received: from nperf12.hd.intel.com ([10.127.88.161]) by fmsmga006.fm.intel.com with ESMTP; 29 Jul 2019 17:32:05 -0700 From: Brian Welty To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Daniel Vetter , =?utf-8?q?Christian_K=C3=B6nig?= , Joonas Lahtinen Subject: [RFC PATCH 2/3] drm: Introduce DRM_MEM defines for specifying type of drm_mem_region Date: Mon, 29 Jul 2019 20:32:24 -0400 Message-Id: <20190730003225.322-3-brian.welty@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190730003225.322-1-brian.welty@intel.com> References: <20190730003225.322-1-brian.welty@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Introduce DRM memory region types to be common for both drivers using TTM and for i915. For now, TTM continues to define it's own set but uses the DRM base definitions. Signed-off-by: Brian Welty --- include/drm/drm_mm.h | 8 ++++++++ include/drm/ttm/ttm_placement.h | 8 ++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h index 465f8d10d863..b78dc9284702 100644 --- a/include/drm/drm_mm.h +++ b/include/drm/drm_mm.h @@ -59,6 +59,14 @@ struct drm_device; struct drm_mm; +/* + * Memory types for drm_mem_region + */ +#define DRM_MEM_SYSTEM 0 +#define DRM_MEM_STOLEN 1 +#define DRM_MEM_VRAM 2 +#define DRM_MEM_PRIV 3 + /** * struct drm_mem_region * diff --git a/include/drm/ttm/ttm_placement.h b/include/drm/ttm/ttm_placement.h index e88a8e39767b..976cf8d2f899 100644 --- a/include/drm/ttm/ttm_placement.h +++ b/include/drm/ttm/ttm_placement.h @@ -37,10 +37,10 @@ * Memory regions for data placement. */ -#define TTM_PL_SYSTEM 0 -#define TTM_PL_TT 1 -#define TTM_PL_VRAM 2 -#define TTM_PL_PRIV 3 +#define TTM_PL_SYSTEM DRM_MEM_SYSTEM +#define TTM_PL_TT DRM_MEM_STOLEN +#define TTM_PL_VRAM DRM_MEM_VRAM +#define TTM_PL_PRIV DRM_MEM_PRIV #define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM) #define TTM_PL_FLAG_TT (1 << TTM_PL_TT)