| Message ID | 20190803142026.9647-2-masneyb@onstation.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | qcom: add OCMEM support | expand |
On Sat, Aug 3, 2019 at 8:20 AM Brian Masney <masneyb@onstation.org> wrote: > > Add device tree bindings for the On Chip Memory (OCMEM) that is present > on some Qualcomm Snapdragon SoCs. > > Signed-off-by: Brian Masney <masneyb@onstation.org> > --- > Changes since v3 > - add ranges property > - remove unnecessary literal block | > - add #address-cells and #size-cells to binding > - rename path devicetree/bindings/sram/qcom/ to devicetree/bindings/sram/ since > this is the only qcom binding in the sram namespace. That was a holdover from > when I originally put this in the soc namespace. > > Changes since v2: > - Add *-sram node and gmu-sram to example. > > Changes since v1: > - Rename qcom,ocmem-msm8974 to qcom,msm8974-ocmem > - Renamed reg-names to ctrl and mem > - update hardware description > - moved from soc to sram namespace in the device tree bindings > > .../devicetree/bindings/sram/qcom,ocmem.yaml | 96 +++++++++++++++++++ > 1 file changed, 96 insertions(+) > create mode 100644 Documentation/devicetree/bindings/sram/qcom,ocmem.yaml > > diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml > new file mode 100644 > index 000000000000..1bb386fffa01 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml > @@ -0,0 +1,96 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sram/qcom/qcom,ocmem.yaml# Need to update the path here too. With that, Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml new file mode 100644 index 000000000000..1bb386fffa01 --- /dev/null +++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sram/qcom/qcom,ocmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs. + +maintainers: + - Brian Masney <masneyb@onstation.org> + +description: | + The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and + audio components on some Snapdragon SoCs. + +properties: + compatible: + const: qcom,msm8974-ocmem + + reg: + items: + - description: Control registers + - description: OCMEM address range + + reg-names: + items: + - const: ctrl + - const: mem + + clocks: + items: + - description: Core clock + - description: Interface clock + + clock-names: + items: + - const: core + - const: iface + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - '#address-cells' + - '#size-cells' + +patternProperties: + "^.+-sram$": + type: object + description: A region of reserved memory. + + properties: + reg: + maxItems: 1 + + ranges: + maxItems: 1 + + required: + - reg + - ranges + +examples: + - | + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/clock/qcom,mmcc-msm8974.h> + + ocmem: ocmem@fdd00000 { + compatible = "qcom,msm8974-ocmem"; + + reg = <0xfdd00000 0x2000>, + <0xfec00000 0x180000>; + reg-names = "ctrl", + "mem"; + + clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, + <&mmcc OCMEMCX_OCMEMNOC_CLK>; + clock-names = "core", + "iface"; + + #address-cells = <1>; + #size-cells = <1>; + + gmu-sram@0 { + reg = <0x0 0x100000>; + ranges = <0 0 0xfec00000 0x100000>; + }; + };
Add device tree bindings for the On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs. Signed-off-by: Brian Masney <masneyb@onstation.org> --- Changes since v3 - add ranges property - remove unnecessary literal block | - add #address-cells and #size-cells to binding - rename path devicetree/bindings/sram/qcom/ to devicetree/bindings/sram/ since this is the only qcom binding in the sram namespace. That was a holdover from when I originally put this in the soc namespace. Changes since v2: - Add *-sram node and gmu-sram to example. Changes since v1: - Rename qcom,ocmem-msm8974 to qcom,msm8974-ocmem - Renamed reg-names to ctrl and mem - update hardware description - moved from soc to sram namespace in the device tree bindings .../devicetree/bindings/sram/qcom,ocmem.yaml | 96 +++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/sram/qcom,ocmem.yaml