| Message ID | 20190806174549.7856-1-harry.wentland@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/amd/display: Add number of slices per line to DSC parameter validation | expand |
On Tue, Aug 6, 2019 at 1:45 PM Harry Wentland <harry.wentland@amd.com> wrote: > > From: Nikola Cornij <nikola.cornij@amd.com> > > [why] > Number of slices per line was mistakenly left out > > Cc: Hariprasad Kelam <hariprasad.kelam@gmail.com> > Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> > Signed-off-by: Harry Wentland <harry.wentland@amd.com> > Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> > --- > > Thanks, Hariprasad, for your patch. The second condition should actually check > for num_slices_h. > > Harry > > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > index e870caa8d4fa..adb69c038efb 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > @@ -302,7 +302,7 @@ static bool dsc_prepare_config(struct display_stream_compressor *dsc, const stru > dsc_cfg->dc_dsc_cfg.linebuf_depth == 0))); > ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.9375 > > - if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_v || > + if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || > !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || > !dsc_cfg->pic_width || !dsc_cfg->pic_height || > !((dsc_cfg->dc_dsc_cfg.version_minor == 1 && // v1.1 line buffer depth range: > -- > 2.22.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c index e870caa8d4fa..adb69c038efb 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c @@ -302,7 +302,7 @@ static bool dsc_prepare_config(struct display_stream_compressor *dsc, const stru dsc_cfg->dc_dsc_cfg.linebuf_depth == 0))); ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.9375 - if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_v || + if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || !dsc_cfg->pic_width || !dsc_cfg->pic_height || !((dsc_cfg->dc_dsc_cfg.version_minor == 1 && // v1.1 line buffer depth range: