From patchwork Sun Aug 11 10:40:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 11088899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BEE7C14DB for ; Sun, 11 Aug 2019 10:40:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B180E1FFC8 for ; Sun, 11 Aug 2019 10:40:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A46DD205F7; Sun, 11 Aug 2019 10:40:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5E4981FFC8 for ; Sun, 11 Aug 2019 10:40:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63EDF6E32D; Sun, 11 Aug 2019 10:40:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailgw01.mediatek.com (unknown [1.203.163.78]) by gabe.freedesktop.org (Postfix) with ESMTP id A0DF36E32E for ; Sun, 11 Aug 2019 10:40:52 +0000 (UTC) X-UUID: 01ce1aa9166a4c46b2583896824e64f2-20190811 X-UUID: 01ce1aa9166a4c46b2583896824e64f2-20190811 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 2070566583; Sun, 11 Aug 2019 18:40:49 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33DR.mediatek.inc (172.27.6.106) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 11 Aug 2019 18:40:42 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 11 Aug 2019 18:40:40 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , , David Airlie , "Matthias Brugger" Subject: [PATCH v6 3/7] drm/mediatek: add dsi reg commit disable control Date: Sun, 11 Aug 2019 18:40:04 +0800 Message-ID: <20190811104008.53372-4-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190811104008.53372-1-jitao.shi@mediatek.com> References: <20190811104008.53372-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1684-8.5.1010-24840.000 X-TM-AS-Result: No-2.463500-8.000000-10 X-TMASE-MatchedRID: oPR0E2xDvMj83RazFYjhB26yfYFZzrGdZ9PKbshf5c4da1Vk3RqxONeu l29/x8ODkREoYNKTmnm1bKejN6nC5P1PYuSZ5yXpqJSK+HSPY++eEP0DdJrulgdkFovAReUovqn FtM6Nq/JrfJNHzOv42smzFW0zy93H2e1cwoB4RlggCPGiZqtI8LtubiieweWumyiLZetSf8mfop 0ytGwvXiq2rl3dzGQ1F16aXoi8Z1nsRNjyF6mdIvibNsxjIyOzZ1+mV30ImeB7xZt7nWevYp7T7 ZmkgQ/6rQnglSC76Hi7PnY3br2onAjrF1fOOaVbU6d6SdlHFEb4hUcAI3yp/uK9rB3JzW5/EdpX 6vXt2EbHJ1PhMfPBow== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--2.463500-8.000000 X-TMASE-Version: SMEX-12.5.0.1684-8.5.1010-24840.000 X-TM-SNTS-SMTP: EDBE0AC4A9314A126DA0109F93C21AC6DABF309848B6EC1F8A5625B92627F2452000:8 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stonea168@163.com, dri-devel@lists.freedesktop.org, Andy Yan , Ajay Kumar , Vincent Palatin , cawa.cheng@mediatek.com, Russell King , Thierry Reding , devicetree@vger.kernel.org, Jitao Shi , linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com, eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org, Rahul Sharma , srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, Sascha Hauer , Sean Paul Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP New DSI IP has shadow register and working reg. The register values are writen to shadow register. And then trigger with commit reg, the register values will be moved working register. This fucntion is defualt on. But this driver doesn't use this function. So add the disable control. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index ac8e80e379f7..314bfb1c827b 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -123,6 +123,10 @@ #define VM_CMD_EN BIT(0) #define TS_VFP_EN BIT(5) +#define DSI_SHADOW_DEBUG 0x190U +#define FORCE_COMMIT BIT(0) +#define BYPASS_SHADOW BIT(1) + #define CONFIG (0xff << 0) #define SHORT_PACKET 0 #define LONG_PACKET 2 @@ -149,6 +153,7 @@ struct phy; struct mtk_dsi_driver_data { const u32 reg_cmdq_off; + bool has_shadow_ctl; }; struct mtk_dsi { @@ -586,6 +591,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) } mtk_dsi_enable(dsi); + + if (dsi->driver_data->has_shadow_ctl) + writel(FORCE_COMMIT | BYPASS_SHADOW, + dsi->regs + DSI_SHADOW_DEBUG); + mtk_dsi_reset_engine(dsi); mtk_dsi_phy_timconfig(dsi);