@@ -125,6 +125,8 @@ struct nvkm_device {
u8 chiprev;
u32 crystal;
+ bool has_runpm;
+
struct {
struct notifier_block nb;
} acpi;
@@ -26,8 +26,9 @@ struct nvkm_pci {
} agp;
struct {
- enum nvkm_pcie_speed speed;
- u8 width;
+ enum nvkm_pcie_speed cur_speed;
+ enum nvkm_pcie_speed def_speed;
+ u8 cur_width;
} pcie;
bool msi;
@@ -52,6 +53,7 @@ int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int gp100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
/* pcie functions */
-int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width);
+int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width,
+ bool save);
enum nvkm_pcie_speed nvkm_pcie_get_speed(struct nvkm_pci *);
#endif
@@ -675,6 +675,7 @@ static int nouveau_drm_probe(struct pci_dev *pdev,
if (nouveau_atomic)
driver_pci.driver_features |= DRIVER_ATOMIC;
+ device->has_runpm = nouveau_pmops_runtime();
drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
if (IS_ERR(drm_dev)) {
@@ -278,7 +278,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
nvkm_debug(subdev, "setting performance state %d\n", pstatei);
clk->pstate = pstatei;
- nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
+ nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width, true);
if (fb && fb->ram && fb->ram->func->calc) {
struct nvkm_ram *ram = fb->ram;
@@ -90,6 +90,8 @@ nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend)
if (pci->agp.bridge)
nvkm_agp_fini(pci);
+ else if (pci_is_pcie(pci->pdev))
+ nvkm_pcie_fini(pci);
return 0;
}
@@ -100,6 +102,8 @@ nvkm_pci_preinit(struct nvkm_subdev *subdev)
struct nvkm_pci *pci = nvkm_pci(subdev);
if (pci->agp.bridge)
nvkm_agp_preinit(pci);
+ else if (pci_is_pcie(pci->pdev))
+ nvkm_pcie_preinit(pci);
return 0;
}
@@ -193,8 +197,9 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device,
pci->func = func;
pci->pdev = device->func->pci(device)->pdev;
pci->irq = -1;
- pci->pcie.speed = -1;
- pci->pcie.width = -1;
+ pci->pcie.cur_speed = -1;
+ pci->pcie.def_speed = -1;
+ pci->pcie.cur_width = -1;
if (device->type == NVKM_DEVICE_AGP)
nvkm_agp_ctor(pci);
@@ -23,6 +23,8 @@
*/
#include "priv.h"
+#include <core/option.h>
+
static char *nvkm_pcie_speeds[] = {
"2.5GT/s",
"5.0GT/s",
@@ -85,6 +87,13 @@ nvkm_pcie_oneinit(struct nvkm_pci *pci)
return 0;
}
+int
+nvkm_pcie_preinit(struct nvkm_pci *pci)
+{
+ pci->pcie.def_speed = nvkm_pcie_get_speed(pci);
+ return 0;
+}
+
int
nvkm_pcie_init(struct nvkm_pci *pci)
{
@@ -105,14 +114,31 @@ nvkm_pcie_init(struct nvkm_pci *pci)
if (pci->func->pcie.init)
pci->func->pcie.init(pci);
- if (pci->pcie.speed != -1)
- nvkm_pcie_set_link(pci, pci->pcie.speed, pci->pcie.width);
+ if (pci->pcie.cur_speed != -1)
+ nvkm_pcie_set_link(pci, pci->pcie.cur_speed,
+ pci->pcie.cur_width, false);
+
+ return 0;
+}
+
+int
+nvkm_pcie_fini(struct nvkm_pci *pci)
+{
+ struct nvkm_device *device = pci->subdev.device;
+ if (!device->has_runpm)
+ return 0;
+
+ if (!nvkm_boolopt(device->cfgopt, "NvRunpmWorkaround", true))
+ return 0;
+ if (!IS_ERR_VALUE(pci->pcie.def_speed))
+ return nvkm_pcie_set_link(pci, pci->pcie.def_speed, 16, false);
return 0;
}
int
-nvkm_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width)
+nvkm_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width,
+ bool save)
{
struct nvkm_subdev *subdev = &pci->subdev;
enum nvkm_pcie_speed cur_speed, max_speed;
@@ -146,8 +172,10 @@ nvkm_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width)
speed = max_speed;
}
- pci->pcie.speed = speed;
- pci->pcie.width = width;
+ if (save) {
+ pci->pcie.cur_speed = speed;
+ pci->pcie.cur_width = width;
+ }
if (speed == cur_speed) {
nvkm_debug(subdev, "requested matches current speed\n");
@@ -60,5 +60,7 @@ enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *);
int gk104_pcie_version_supported(struct nvkm_pci *);
int nvkm_pcie_oneinit(struct nvkm_pci *);
+int nvkm_pcie_preinit(struct nvkm_pci *);
int nvkm_pcie_init(struct nvkm_pci *);
+int nvkm_pcie_fini(struct nvkm_pci *);
#endif
Apperantly things go south if we suspend the device with a different PCIE link speed set than it got booted with. Fixes runtime suspend on my gp107. This all looks like some bug inside the pci subsystem and I would prefer a fix there instead of nouveau, but maybe there is no real nice way of doing that outside of drivers? v2: squashed together patch 4 and 5 v3: only restore pcie speed on machines with runpm add NvRunpmWorkaround config option to disable the workaround Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> (v2) CC: Alex Hung <alex.hung@canonical.com> CC: Rafael J. Wysocki <rafael.j.wysocki@intel.com> CC: Dave Airlie <airlied@redhat.com> CC: Lyude Paul <lyude@redhat.com> CC: Ben Skeggs <bskeggs@redhat.com> --- .../drm/nouveau/include/nvkm/core/device.h | 2 + .../gpu/drm/nouveau/include/nvkm/subdev/pci.h | 8 ++-- drivers/gpu/drm/nouveau/nouveau_drm.c | 1 + .../gpu/drm/nouveau/nvkm/subdev/clk/base.c | 2 +- .../gpu/drm/nouveau/nvkm/subdev/pci/base.c | 9 ++++- .../gpu/drm/nouveau/nvkm/subdev/pci/pcie.c | 38 ++++++++++++++++--- .../gpu/drm/nouveau/nvkm/subdev/pci/priv.h | 2 + 7 files changed, 51 insertions(+), 11 deletions(-)