From patchwork Thu Sep 19 06:58:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 11151689 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 46E8617E6 for ; Thu, 19 Sep 2019 06:58:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2108821848 for ; Thu, 19 Sep 2019 06:58:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2108821848 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7CE5F6F77D; Thu, 19 Sep 2019 06:58:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailgw02.mediatek.com (unknown [1.203.163.81]) by gabe.freedesktop.org (Postfix) with ESMTP id A6FB26F77D for ; Thu, 19 Sep 2019 06:58:45 +0000 (UTC) X-UUID: ac7d909c85ea4f26a8f1980efecd237e-20190919 X-UUID: ac7d909c85ea4f26a8f1980efecd237e-20190919 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1547420039; Thu, 19 Sep 2019 14:58:40 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33DR.mediatek.inc (172.27.6.106) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 19 Sep 2019 14:58:36 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 19 Sep 2019 14:58:35 +0800 From: Jitao Shi To: CK Hu , David Airlie , Daniel Vetter , Subject: [PATCH v7 3/9] drm/mediatek: replace writeb() with mtk_dsi_mask() Date: Thu, 19 Sep 2019 14:58:00 +0800 Message-ID: <20190919065806.111016-4-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190919065806.111016-1-jitao.shi@mediatek.com> References: <20190919065806.111016-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1684-8.5.1010-24920.005 X-TM-AS-Result: No-6.079800-8.000000-10 X-TMASE-MatchedRID: k/L/ofNtQd07cRSju2zlXqMY62qeQBkLy733NwuklsIy/xh6GqNHVWMg VHfStGn65UUUZCVUbO+bHAuQ1dUnuWJZXQNDzktSGjzBgnFZvQ6CxYB2hPS4vSS30GKAkBxW7fK xaM2xqkBHHd35tBrozO9EJt2F5OksHxPMjOKY7A/QLWxBF9DMQcRB0bsfrpPIfiAqrjYtFiQcos wtc7gt2g2WiK0Y4tZwxJbqWiccMa7tCocc2G1Lq37cGd19dSFd X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.079800-8.000000 X-TMASE-Version: SMEX-12.5.0.1684-8.5.1010-24920.005 X-TM-SNTS-SMTP: 467409EFD92600159E2DB5F3B02363269D1CE4BE3B660A29B3D1A6361BF09E7A2000:8 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jitao Shi , srv_heupstream@mediatek.com, stonea168@163.com, cawa.cheng@mediatek.com, sj.huang@mediatek.com, linux-mediatek@lists.infradead.org, Matthias Brugger , yingjoe.chen@mediatek.com, eddie.huang@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The writeb() is unavailable in mt8173. Because the mt8173 dsi module doesn't support 8bit mode access. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dsi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 7e24d03cdccc..ac8e80e379f7 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -960,7 +960,9 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg) } for (i = 0; i < msg->tx_len; i++) - writeb(tx_buf[i], dsi->regs + reg_cmdq_off + cmdq_off + i); + mtk_dsi_mask(dsi, (reg_cmdq_off + cmdq_off + i) & (~0x3U), + (0xffUL << (((i + cmdq_off) & 3U) * 8U)), + tx_buf[i] << (((i + cmdq_off) & 3U) * 8U)); mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val); mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size);