From patchwork Tue Oct 1 16:17:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lipski, Mikita" X-Patchwork-Id: 11169235 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D10E81709 for ; Tue, 1 Oct 2019 16:18:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B8F2821924 for ; Tue, 1 Oct 2019 16:18:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B8F2821924 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amd.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4EBE6E861; Tue, 1 Oct 2019 16:17:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from NAM05-CO1-obe.outbound.protection.outlook.com (mail-eopbgr720083.outbound.protection.outlook.com [40.107.72.83]) by gabe.freedesktop.org (Postfix) with ESMTPS id AE71A6E85C; Tue, 1 Oct 2019 16:17:52 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YYsIJOtwi/7NB1aRoARZxLSqsp+u5Tzl7hTY1dXZ9tlDLRkwRCmZtZI1hp0dxXPhsJN1r/vTf0tGSpplYG24JC72bGpcS0j5AvncZdrfCxcXZncf9/NlbEiLa4MWTaKU4MhET7CGw2dx8+ZZEJbXOQq2DozkeHAZJHr2/pT2m9tKjM5luYVmabf2BRkwe8lHsH4hd814oFNKKnn2CVYKsndhzgi7i54glLA6Tv0HT++N70fNuzUpiZsAckYrG0SIHBXafkvrdRjbLiAnYnU4JVkOxYjxTQAxxQNKwyKkYZwqlncILUk5+H90+vOoPRVNUGypqyJaVMCbIhu3xhxOuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zhgE7SnYNUh+YgxEXWIAEBbXDLkxlHvQje5tJoKA9yQ=; b=VYj8sZT9TGXvDfL/C86KVUsb/DlxiQvgPs0Cg8Z12sbTxrxCMwEHeRR9iaPPb9xtrfOCSP3jxZR219ZtPk76pU9HJV0YjQXtg0ndGds2nKg7AZm6L9KWZL4B9pkQSM/fgP7jc8v+oWWoClqmSnjoelrtLoNGhT47vPkjfScSSSlTBasP7wh5+BSQMs9IPn1AY468AP7npG/RyYDTCK4gHqv3Sd3uggVlZy/crVhpgYCux5Bbrya41X40Y/QU2C3MPjxGTZBidq22IJnkOlGB6grlq9UOeVL1FxwHcEXxCpUETVxQDjpuQ28WKCzgZQBBniMfPSXrlvcsZpK4Ew6MBw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 165.204.84.17) smtp.rcpttodomain=redhat.com smtp.mailfrom=amd.com; dmarc=permerror action=none header.from=amd.com; dkim=none (message not signed); arc=none Received: from DM3PR12CA0108.namprd12.prod.outlook.com (2603:10b6:0:55::28) by DM6PR12MB3212.namprd12.prod.outlook.com (2603:10b6:5:185::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2305.20; Tue, 1 Oct 2019 16:17:50 +0000 Received: from CO1NAM03FT051.eop-NAM03.prod.protection.outlook.com (2a01:111:f400:7e48::202) by DM3PR12CA0108.outlook.office365.com (2603:10b6:0:55::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2305.20 via Frontend Transport; Tue, 1 Oct 2019 16:17:50 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV02.amd.com (165.204.84.17) by CO1NAM03FT051.mail.protection.outlook.com (10.152.80.242) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2305.15 via Frontend Transport; Tue, 1 Oct 2019 16:17:48 +0000 Received: from mlipski-pc.amd.com (10.180.168.240) by SATLEXCHOV02.amd.com (10.181.40.72) with Microsoft SMTP Server id 14.3.389.1; Tue, 1 Oct 2019 11:17:39 -0500 From: To: Subject: [PATCH 13/14] drm/amd/display: Recalculate VCPI slots for new DSC connectors Date: Tue, 1 Oct 2019 12:17:20 -0400 Message-ID: <20191001161721.13793-14-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001161721.13793-13-mikita.lipski@amd.com> References: <20191001161721.13793-1-mikita.lipski@amd.com> <20191001161721.13793-2-mikita.lipski@amd.com> <20191001161721.13793-3-mikita.lipski@amd.com> <20191001161721.13793-4-mikita.lipski@amd.com> <20191001161721.13793-5-mikita.lipski@amd.com> <20191001161721.13793-6-mikita.lipski@amd.com> <20191001161721.13793-7-mikita.lipski@amd.com> <20191001161721.13793-8-mikita.lipski@amd.com> <20191001161721.13793-9-mikita.lipski@amd.com> <20191001161721.13793-10-mikita.lipski@amd.com> <20191001161721.13793-11-mikita.lipski@amd.com> <20191001161721.13793-12-mikita.lipski@amd.com> <20191001161721.13793-13-mikita.lipski@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(376002)(39860400002)(396003)(136003)(346002)(428003)(189003)(199004)(50466002)(2876002)(5660300002)(16586007)(50226002)(14444005)(2906002)(8676002)(316002)(1076003)(54906003)(81166006)(8936002)(81156014)(186003)(426003)(336012)(446003)(11346002)(486006)(53416004)(7696005)(6666004)(51416003)(76176011)(2616005)(476003)(126002)(70586007)(356004)(47776003)(2351001)(36756003)(6916009)(305945005)(70206006)(478600001)(48376002)(26005)(86362001)(4326008)(16060500001); DIR:OUT; SFP:1101; SCL:1; SRVR:DM6PR12MB3212; H:SATLEXCHOV02.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; MX:1; A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 457c4435-fdb9-4aae-8d4c-08d7468ae773 X-MS-TrafficTypeDiagnostic: DM6PR12MB3212: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-Forefront-PRVS: 0177904E6B X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5xJ13gjURsn/LZBGpDME2LIqiXE4b22Aj7Zw9RbG6aL3OQ123RXQhh1S6hGbUldW+gESjceVGYSFEW+OzvMErRBdr0LyIVmitHbwXSMfHAewL65IRYMAkaZra/jjd79D9xUEs03twrYv/EgDibEXiEXHoM1gjrPourKjpdF5Y0W6/ok9CU3VUANCqqbnVG3PEwtwSekkm/P4bITb0hQb+Hl0eUSR1ZRSzrN27VGwaUBt5bgppoMTO26xLHaAyA2jNDUE1OrcRDw06nU5nNkm/ZVZnn8EVQjgz4eSPHz8hwHXRfkRnI+GjjbEnI9yMrvs/lSE53L4xK6G2cNXOmg7E3z/E/VMDOiepdIf+tzGfyETqWohbuwnHgknJtUaBpS0b2w3+DfuC9Fhc+EzO0eVolp1O0hWRv3Z/XtMWTiVIT8= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2019 16:17:48.7166 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 457c4435-fdb9-4aae-8d4c-08d7468ae773 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3212 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zhgE7SnYNUh+YgxEXWIAEBbXDLkxlHvQje5tJoKA9yQ=; b=3N3YCDZLD/6vIzZldHKbQeaRsop47Svb2WhdSNCGDYGambnnWQEG3B16200fbp+4KUqqZGi49zSF5zIS7eok3F2WBHDe5P/fcz/QKGHAjGJ99It3rtYXr86+JGL4e379o2XtnEmrCuCzyzmJ8Kjqao+b9Zt7asE5IB3rMe6lly8= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; redhat.com; dkim=none (message not signed) header.d=none;redhat.com; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jerry Zuo , Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Mikita Lipski Since for DSC MST connector's PBN is claculated differently due to compression, we have to recalculate both PBN and VCPI slots for that connector. This patch proposes to use similair logic as in dm_encoder_helper_atomic_chek, but since we do not know which connectors will have DSC enabled we have to recalculate PBN only after that's determined, which is done in compute_mst_dsc_configs_for_state. Cc: Jerry Zuo Cc: Harry Wentland Cc: Lyude Paul Signed-off-by: Mikita Lipski --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 64 +++++++++++++++++-- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 6 -- 2 files changed, 59 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 81e30918f9ec..7501ce2233ed 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -4569,6 +4569,27 @@ static void dm_encoder_helper_disable(struct drm_encoder *encoder) } +static int convert_dc_color_depth_into_bpc (enum dc_color_depth display_color_depth) +{ + switch (display_color_depth) { + case COLOR_DEPTH_666: + return 6; + case COLOR_DEPTH_888: + return 8; + case COLOR_DEPTH_101010: + return 10; + case COLOR_DEPTH_121212: + return 12; + case COLOR_DEPTH_141414: + return 14; + case COLOR_DEPTH_161616: + return 16; + default: + break; + } + return 0; +} + static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -4616,6 +4637,36 @@ const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs = { .atomic_check = dm_encoder_helper_atomic_check }; +#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT +static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state, + struct dc_state *dc_state) +{ + struct dc_stream_state *stream; + struct amdgpu_dm_connector *aconnector; + int i, clock = 0, bpp = 0; + + for (i = 0; i < dc_state->stream_count; i++) { + stream = dc_state->streams[i]; + aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; + + if (stream && stream->timing.flags.DSC == 1) { + bpp = convert_dc_color_depth_into_bpc(stream->timing.display_color_depth)* 3; + clock = stream->timing.pix_clk_100hz / 10; + + aconnector->pbn = drm_dp_calc_pbn_mode(clock, bpp, true); + + aconnector->vcpi_slots = drm_dp_atomic_find_vcpi_slots(state, + &aconnector->mst_port->mst_mgr, + aconnector->port, + aconnector->pbn); + if (aconnector->vcpi_slots < 0) + return aconnector->vcpi_slots; + } + } + return 0; +} +#endif + static void dm_drm_plane_reset(struct drm_plane *plane) { struct dm_plane_state *amdgpu_state = NULL; @@ -7629,11 +7680,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, if (ret) goto fail; - /* Perform validation of MST topology in the state*/ - ret = drm_dp_mst_atomic_check(state); - if (ret) - goto fail; - if (state->legacy_cursor_update) { /* * This is a fast cursor update coming from the plane update @@ -7705,6 +7751,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT if (!compute_mst_dsc_configs_for_state(dm_state->context)) goto fail; + + ret = dm_update_mst_vcpi_slots_for_dsc(state, dm_state->context); + if (ret) + goto fail; #endif if (dc_validate_global_state(dc, dm_state->context, false) != DC_OK) { ret = -EINVAL; @@ -7734,6 +7784,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, dc_retain_state(old_dm_state->context); } } + /* Perform validation of MST topology in the state*/ + ret = drm_dp_mst_atomic_check(state); + if (ret) + goto fail; /* Store the overall update type for use later in atomic check. */ for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index bd694499e3de..3e44e2da2d0d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -201,12 +201,6 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( mst_port = aconnector->port; if (enable) { - - /* Convert kilobits per second / 64 (for 64 timeslots) to pbn (54/64 megabytes per second) */ - pbn_per_timeslot = dc_link_bandwidth_kbps( - stream->link, dc_link_get_link_cap(stream->link)) / (8 * 1000 * 54); - aconnector->vcpi_slots = DIV_ROUND_UP(aconnector->pbn, pbn_per_timeslot); - ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, aconnector->pbn, aconnector->vcpi_slots);