From patchwork Wed Oct 2 01:49:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 11170163 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 002FC1599 for ; Wed, 2 Oct 2019 01:49:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC91620815 for ; Wed, 2 Oct 2019 01:49:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC91620815 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D612189198; Wed, 2 Oct 2019 01:49:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D9D56E5CF for ; Wed, 2 Oct 2019 01:49:41 +0000 (UTC) Received: by mail-pf1-x444.google.com with SMTP id 205so9458931pfw.2 for ; Tue, 01 Oct 2019 18:49:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=1Ebjptdz2m5kxB+3iL69Y2gpNQMsC3ZxXi6iLvTnhmU=; b=QZ+OJx6pMvRXdbNWPExS3ltyls84dMApXYieXNvUOdeLdcm9or3RLWAMA7PZEZgKoG b0nIhfQNKq7IiNGzmlzUZoGbjtbvflfJOuMWvQEdLu2O0x+5G28wuG10Rc0MEgSXwYIA TgFZ+ko31gb7HMGI1Xg2GhHibhpx9j0A5cnPuaJ2JciTOcQNdWdYjQnLVDJlxDKQ2Tzi YZ/f7Ql1DqHy2+f4fWBfno/ic7vSy2srLZqrcbcnbJDHJMOIdSQN3P7CffOiFjeGW18U k7qTDHYJCJas6lrxQDW0e2TUq3j/n48KlturKfRBNh0SRQHcpJimVdY6vayU9m589v0e BzBA== X-Gm-Message-State: APjAAAVZft8P+gOTKSwI25d+dL0q1I/dm2kaBV9Uj4468HF2F1d1RHqr VzLJ/OswiAAiNi+EPeEnxGRk+iyDk8Q= X-Google-Smtp-Source: APXvYqwwCYLibN++pbDmb8JgapmrwUr5omMv5p1Nw0t2I/A7M/xctTmUi25AYwiAjJ+Tc754vGX1qQ== X-Received: by 2002:aa7:8816:: with SMTP id c22mr1632312pfo.197.1569980980244; Tue, 01 Oct 2019 18:49:40 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:202:201:bc97:5740:52a7:6875]) by smtp.gmail.com with ESMTPSA id k15sm19404326pgt.66.2019.10.01.18.49.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Oct 2019 18:49:39 -0700 (PDT) From: Gurchetan Singh To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/2] drm/virtgpu: plumb fix for virtgpu_drm.h / virtio_gpu.h discrepancy Date: Tue, 1 Oct 2019 18:49:34 -0700 Message-Id: <20191002014935.33171-1-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=1Ebjptdz2m5kxB+3iL69Y2gpNQMsC3ZxXi6iLvTnhmU=; b=m54sNT9+Oe6H9z+Sc5ihrPT0SPOZp0/DzaTh4qaR9dNoklBzIxLR61MMxLvgiC8lxZ lGYxLuuxnflEmFxqmHkyjhwhXnc1yyM+GZ+Q3xEdBOEWsFQQgE8snbLBCrxzxFVWJCT5 myfu+lLYJwTzA0uhCu6TNQ4sSME7dIw9HcgxA= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: airlied@linux.ie, kraxel@redhat.com, Gurchetan Singh Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" virglrenderer has logic to validate both stride and layer_stride, but both are always zero. The fallback for that case is: stride = width * bytes_per_pixel layer_stride = stride * num_layers However, this assumption causes trouble in the following cases: 1) When allocating host-compatible buffers for the planned wayland integration. 2) Certain YUV buffers, which Gallium imports as 3 R8 buffers with variable strides. For example, HAL_PIXEL_FORMAT_YV12 requires that the chroma planes are aligned to 16 bytes. This commit doesn't fix the discrepancy, but adds the necessary plumbing so we don't forget. Signed-off-by: Gurchetan Singh --- drivers/gpu/drm/virtio/virtgpu_drv.h | 2 ++ drivers/gpu/drm/virtio/virtgpu_ioctl.c | 9 ++++++--- drivers/gpu/drm/virtio/virtgpu_vq.c | 6 ++++++ 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/virtgpu_drv.h index 314e02f94d9c..c1c9a9b8e25c 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.h +++ b/drivers/gpu/drm/virtio/virtgpu_drv.h @@ -312,12 +312,14 @@ void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, uint32_t ctx_id, uint64_t offset, uint32_t level, + uint32_t stride, uint32_t layer_stride, struct virtio_gpu_box *box, struct virtio_gpu_object_array *objs, struct virtio_gpu_fence *fence); void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, uint32_t ctx_id, uint64_t offset, uint32_t level, + uint32_t stride, uint32_t layer_stride, struct virtio_gpu_box *box, struct virtio_gpu_object_array *objs, struct virtio_gpu_fence *fence); diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c b/drivers/gpu/drm/virtio/virtgpu_ioctl.c index 9af1ec62434f..98b72dead962 100644 --- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c +++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c @@ -324,8 +324,10 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev, ret = -ENOMEM; goto err_unlock; } + + /* TODO: add the correct stride / layer_stride. */ virtio_gpu_cmd_transfer_from_host_3d - (vgdev, vfpriv->ctx_id, offset, args->level, + (vgdev, vfpriv->ctx_id, offset, args->level, 0, 0, &box, objs, fence); dma_fence_put(&fence->f); return 0; @@ -369,10 +371,11 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data, if (!fence) goto err_unlock; + /* TODO: add the correct stride / layer_stride. */ virtio_gpu_cmd_transfer_to_host_3d (vgdev, - vfpriv ? vfpriv->ctx_id : 0, offset, - args->level, &box, objs, fence); + vfpriv ? vfpriv->ctx_id : 0, offset, args->level, + 0, 0, &box, objs, fence); dma_fence_put(&fence->f); } return 0; diff --git a/drivers/gpu/drm/virtio/virtgpu_vq.c b/drivers/gpu/drm/virtio/virtgpu_vq.c index 80176f379ad5..9fb3c8c3b687 100644 --- a/drivers/gpu/drm/virtio/virtgpu_vq.c +++ b/drivers/gpu/drm/virtio/virtgpu_vq.c @@ -965,6 +965,7 @@ virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, uint32_t ctx_id, uint64_t offset, uint32_t level, + uint32_t stride, uint32_t layer_stride, struct virtio_gpu_box *box, struct virtio_gpu_object_array *objs, struct virtio_gpu_fence *fence) @@ -990,6 +991,8 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, cmd_p->box = *box; cmd_p->offset = cpu_to_le64(offset); cmd_p->level = cpu_to_le32(level); + cmd_p->stride = cpu_to_le32(stride); + cmd_p->layer_stride = cpu_to_le32(layer_stride); virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence); } @@ -997,6 +1000,7 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, uint32_t ctx_id, uint64_t offset, uint32_t level, + uint32_t stride, uint32_t layer_stride, struct virtio_gpu_box *box, struct virtio_gpu_object_array *objs, struct virtio_gpu_fence *fence) @@ -1016,6 +1020,8 @@ void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, cmd_p->box = *box; cmd_p->offset = cpu_to_le64(offset); cmd_p->level = cpu_to_le32(level); + cmd_p->stride = cpu_to_le32(stride); + cmd_p->layer_stride = cpu_to_le32(layer_stride); virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence); }