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Mon, 21 Oct 2019 07:23:04 +0000 From: "james qian wang (Arm Technology China)" To: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "imirkin@alum.mit.edu" Subject: [PATCH v6 1/4] drm: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Topic: [PATCH v6 1/4] drm: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Index: AQHVh+Bgb3FMRWa44UmY+hx9enDm4A== Date: Mon, 21 Oct 2019 07:23:04 +0000 Message-ID: <20191021072215.3993-2-james.qian.wang@arm.com> References: <20191021072215.3993-1-james.qian.wang@arm.com> In-Reply-To: <20191021072215.3993-1-james.qian.wang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [113.29.88.7] x-clientproxiedby: HK2PR0401CA0019.apcprd04.prod.outlook.com (2603:1096:202:2::29) To VE1PR08MB5006.eurprd08.prod.outlook.com (2603:10a6:803:113::31) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=james.qian.wang@arm.com; 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dmarc=none action=none header.from=arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nd , Ayan Halder , "Oscar Zhang \(Arm Technology China\)" , "Tiannan Zhu \(Arm Technology China\)" , Mihail Atanassov , Daniel Vetter , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , "Channing Chen \(Arm Technology China\)" , "james qian wang \(Arm Technology China\)" , "Yiqi Kang \(Arm Technology China\)" , "Thomas Sun \(Arm Technology China\)" , "Lowry Li \(Arm Technology China\)" , Ben Davis Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to convert S31.32 sign-magnitude to Qm.n 2's complement that supported by hardware. V4: Address Mihai, Daniel and Ilia's review comments. V5: Includes the sign bit in the value of m (Qm.n). V6: Allows m == 0 according to Mihail's comments. Signed-off-by: james qian wang (Arm Technology China) Reviewed-by: Mihail Atanassov Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_color_mgmt.c | 36 ++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 2 ++ 2 files changed, 38 insertions(+) -- 2.20.1 diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 4ce5c6d8de99..0f833470d049 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -132,6 +132,42 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision) } EXPORT_SYMBOL(drm_color_lut_extract); +/** + * drm_color_ctm_s31_32_to_qm_n + * + * @user_input: input value + * @m: number of integer bits, only support m <= 32, include the sign-bit + * @n: number of fractional bits, only support n <= 32 + * + * Convert and clamp S31.32 sign-magnitude to Qm.n (signed 2's complement). The + * higher bits that above m + n are cleared or equal to sign-bit BIT(m+n). + * the range of value is [-2^(m-1), 2^(m-1) - 2^-n] + * + * For example + * A Q3.12 format number: + * - required bit: 3 + 12 = 15bits + * - range: [-2^2, 2^2 - 2^−15] + * + * NOTE: the m can be zero if all bit_precision are used to present fractional + * bits like Q0.32 + */ +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, + uint32_t m, uint32_t n) +{ + u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n); + bool negative = !!(user_input & BIT_ULL(63)); + s64 val; + + WARN_ON(m > 32 || n > 32); + + + val = clamp_val(mag, 0, negative ? + BIT_ULL(n + m - 1) : BIT_ULL(n + m - 1) - 1); + + return negative ? -val : val; +} +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); + /** * drm_crtc_enable_color_mgmt - enable color management properties * @crtc: DRM CRTC diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index d1c662d92ab7..60fea5501886 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -30,6 +30,8 @@ struct drm_crtc; struct drm_plane; uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision); +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, + uint32_t m, uint32_t n); void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, uint degamma_lut_size,