diff mbox series

drm: Fix DSC throughput mode 0 mask definition

Message ID 20191021150345.igdye4kv35nsk4ox@outlook.office365.com (mailing list archive)
State New, archived
Headers show
Series drm: Fix DSC throughput mode 0 mask definition | expand

Commit Message

Rodrigo Siqueira Jordao Oct. 21, 2019, 3:03 p.m. UTC
Commit d7cd0e05 introduced a change at DP_DSC_THROUGHPUT_MODE_0_170
which is not aligned with the spec. This commit replace 15 << 4 by
15 << 0 for DP_DSC_THROUGHPUT_MODE_0_170 in order to make it follow the
specification.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Nikola Cornij <nikola.cornij@amd.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: d7cd0e053b1 (drm/amd/display: Add 170Mpix/sec DSC throughput support)
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
 include/drm/drm_dp_helper.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Harry Wentland Oct. 21, 2019, 3:35 p.m. UTC | #1
On 2019-10-21 11:03 a.m., Siqueira, Rodrigo wrote:
> Commit d7cd0e05 introduced a change at DP_DSC_THROUGHPUT_MODE_0_170
> which is not aligned with the spec. This commit replace 15 << 4 by
> 15 << 0 for DP_DSC_THROUGHPUT_MODE_0_170 in order to make it follow the
> specification.
> 
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Leo Li <sunpeng.li@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Nikola Cornij <nikola.cornij@amd.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Fixes: d7cd0e053b1 (drm/amd/display: Add 170Mpix/sec DSC throughput support)
> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> ---
>  include/drm/drm_dp_helper.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index cfadeeef8492..52024049c59e 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -306,7 +306,7 @@
>  # define DP_DSC_THROUGHPUT_MODE_0_900       (12 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_950       (13 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_1000      (14 << 0)
> -# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 4)
> +# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 0) /* 1.4a */
>  # define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
>  # define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
>  # define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0
>
diff mbox series

Patch

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index cfadeeef8492..52024049c59e 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -306,7 +306,7 @@ 
 # define DP_DSC_THROUGHPUT_MODE_0_900       (12 << 0)
 # define DP_DSC_THROUGHPUT_MODE_0_950       (13 << 0)
 # define DP_DSC_THROUGHPUT_MODE_0_1000      (14 << 0)
-# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 4)
+# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 0) /* 1.4a */
 # define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
 # define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
 # define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0