@@ -360,6 +360,10 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
#define DRM_I915_GEM_OBJECT_SETPARAM DRM_I915_GEM_CONTEXT_SETPARAM
+#define DRM_I915_GEM_VM_GETPARAM DRM_I915_GEM_CONTEXT_GETPARAM
+#define DRM_I915_GEM_VM_SETPARAM DRM_I915_GEM_CONTEXT_SETPARAM
+#define DRM_I915_BIND 0x3c
+#define DRM_I915_SVM_MIGRATE 0x3d
/* Must be kept compact -- no holes */
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -423,6 +427,10 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control)
#define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control)
#define DRM_IOCTL_I915_GEM_OBJECT_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_OBJECT_SETPARAM, struct drm_i915_gem_object_param)
+#define DRM_IOCTL_I915_GEM_VM_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_GETPARAM, struct drm_i915_gem_vm_param)
+#define DRM_IOCTL_I915_GEM_VM_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_SETPARAM, struct drm_i915_gem_vm_param)
+#define DRM_IOCTL_I915_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_BIND, struct drm_i915_bind)
+#define DRM_IOCTL_I915_SVM_MIGRATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SVM_MIGRATE, struct drm_i915_svm_migrate)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -620,6 +628,9 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/* Shared Virtual Memory (SVM) support capability */
+#define I915_PARAM_HAS_SVM 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
@@ -1815,6 +1826,17 @@ struct drm_i915_gem_vm_control {
__u32 vm_id;
};
+struct drm_i915_gem_vm_param {
+ __u32 vm_id;
+ __u32 rsvd;
+
+#define I915_VM_PARAM (2ull << 32)
+#define I915_GEM_VM_PARAM_SVM 0x1
+ __u64 param;
+
+ __u64 value;
+};
+
struct drm_i915_reg_read {
/*
* Register offset.
@@ -2268,6 +2290,54 @@ struct drm_i915_query_perf_config {
__u8 data[];
};
+/**
+ * struct drm_i915_bind
+ *
+ * Bind an object/buffer in a vm's page table.
+ */
+struct drm_i915_bind {
+ /** VA start to bind **/
+ __u64 start;
+
+ /**
+ * VA length to [un]bind
+ * length only required while binding buffers.
+ */
+ __u64 length;
+
+ /** Type of memory to [un]bind **/
+ __u32 type;
+#define I915_BIND_SVM_BUFFER 0
+#define I915_BIND_SVM_GEM_OBJ 1
+
+ /** Object handle to [un]bind for I915_BIND_SVM_GEM_OBJ type **/
+ __u32 handle;
+
+ /** vm to [un]bind **/
+ __u32 vm_id;
+
+ /** Flags **/
+ __u32 flags;
+#define I915_BIND_UNBIND (1 << 0)
+#define I915_BIND_READONLY (1 << 1)
+};
+
+/**
+ * struct drm_i915_svm_migrate
+ *
+ * Migrate an address range to a memory region.
+ */
+struct drm_i915_svm_migrate {
+ /** VA start to migrate **/
+ __u64 start;
+
+ /** VA length to migrate **/
+ __u64 length;
+
+ /** Memory region to migrate to **/
+ __u32 region;
+};
+
#if defined(__cplusplus)
}
#endif