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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id l17sm26821557wro.77.2019.12.09.04.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2019 04:00:18 -0800 (PST) From: Thierry Reding To: Ben Skeggs Subject: [PATCH v3 6/9] drm/nouveau: tegra: Set clock rate if not set Date: Mon, 9 Dec 2019 13:00:02 +0100 Message-Id: <20191209120005.2254786-7-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191209120005.2254786-1-thierry.reding@gmail.com> References: <20191209120005.2254786-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n1tTzvYM5w9+u5hVDlIZGuSZUZEgZbCTm+ltdJcT/B4=; b=E8zburFTQFbyXTDRWkkvQMSz5JNfUifO6kw1FDbBuBwPKbzpbbw/fKkOr9jz3xU9Ej LcipXvsmVU9ZQ6KmHbbJzmjImuxsTMD6Kr0VgCsiXmlt59hBMCzZyoNPWpgBJtu+AcvV YwzcQI8m0jrqljc12UDr9iVDSYqJJU0y7Eyb2jRQ+aPh7F5frcKJXHnP5vLprMHgXQJR q0cYYx7n5643QUY57xo0OqvwYKbKTJDELa4EsbU9j8B0KgHSBXyWe8jZvXfqKQPI4F6i Swo6xinD0cSmQO4g9qf/yBdC5dOr8PxVzt6G8NbnOcD2xiCNgkk1HrNBSpxQol3wZhmX KwsA== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Thierry Reding If the GPU clock has not had a rate set, initialize it to the maximum clock rate to make sure it does run. Signed-off-by: Thierry Reding --- drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 747a775121cf..d0d52c1d4aee 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -279,6 +279,7 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, struct nvkm_device **pdevice) { struct nvkm_device_tegra *tdev; + unsigned long rate; int ret; if (!(tdev = kzalloc(sizeof(*tdev), GFP_KERNEL))) @@ -307,6 +308,17 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, goto free; } + rate = clk_get_rate(tdev->clk); + if (rate == 0) { + ret = clk_set_rate(tdev->clk, ULONG_MAX); + if (ret < 0) + goto free; + + rate = clk_get_rate(tdev->clk); + + dev_dbg(&pdev->dev, "GPU clock set to %lu\n", rate); + } + if (func->require_ref_clk) tdev->clk_ref = devm_clk_get(&pdev->dev, "ref"); if (IS_ERR(tdev->clk_ref)) {