Message ID | 20191210084828.19664-3-james.qian.wang@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/komeda: Add new product "D32" support | expand |
On Tuesday, 10 December 2019 08:48:51 GMT james qian wang (Arm Technology China) wrote: > D32 is simple version of D71, the difference is: > - Only has one pipeline > - Drop the periph block and merge it to GCU > > v2: Rebase. > v3: Isolate the block counting fix to a new patch I would've expected the fix to be a part of this series as 2/3 and this patch as 3/3. Otherwise, this patch is Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com> > > Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> > --- > .../drm/arm/display/include/malidp_product.h | 3 +- > .../arm/display/komeda/d71/d71_component.c | 2 +- > .../gpu/drm/arm/display/komeda/d71/d71_dev.c | 39 ++++++++++++------- > .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 +++++++ > .../gpu/drm/arm/display/komeda/komeda_drv.c | 1 + > 5 files changed, 42 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h b/drivers/gpu/drm/arm/display/include/malidp_product.h > index 1053b11352eb..16a8a2c22c42 100644 > --- a/drivers/gpu/drm/arm/display/include/malidp_product.h > +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h > @@ -18,7 +18,8 @@ > #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF) > > /* Mali-display product IDs */ > -#define MALIDP_D71_PRODUCT_ID 0x0071 > +#define MALIDP_D71_PRODUCT_ID 0x0071 > +#define MALIDP_D32_PRODUCT_ID 0x0032 > > union komeda_config_id { > struct { > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c > index b6517c46e670..8a02ade369db 100644 > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c > @@ -1270,7 +1270,7 @@ static int d71_timing_ctrlr_init(struct d71_dev *d71, > > ctrlr = to_ctrlr(c); > > - ctrlr->supports_dual_link = true; > + ctrlr->supports_dual_link = d71->supports_dual_link; > > return 0; > } > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c > index 7e79c2e88421..dd1ecf4276d3 100644 > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c > @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev *mdev) > goto err_cleanup; > } > > - /* probe PERIPH */ > + /* Only the legacy HW has the periph block, the newer merges the periph > + * into GCU > + */ > value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO); > - if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) { > - DRM_ERROR("access blk periph but got blk: %d.\n", > - BLOCK_INFO_BLK_TYPE(value)); > - err = -EINVAL; > - goto err_cleanup; > + if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) > + d71->periph_addr = NULL; > + > + if (d71->periph_addr) { > + /* probe PERIPHERAL in legacy HW */ > + value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID); > + > + d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048; > + d71->max_vsize = 4096; > + d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1; > + d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN); > + d71->integrates_tbu = !!(value & PERIPH_TBU_EN); > + } else { > + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0); > + d71->max_line_size = GCU_MAX_LINE_SIZE(value); > + d71->max_vsize = GCU_MAX_NUM_LINES(value); > + > + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1); > + d71->num_rich_layers = GCU_NUM_RICH_LAYERS(value); > + d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value); > + d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value); > } > > - value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID); > - > - d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048; > - d71->max_vsize = 4096; > - d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1; > - d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false; > - d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false; > - > for (i = 0; i < d71->num_pipelines; i++) { > pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline), > &d71_pipeline_funcs); > @@ -606,6 +616,7 @@ d71_identify(u32 __iomem *reg_base, struct komeda_chip_info *chip) > > switch (product_id) { > case MALIDP_D71_PRODUCT_ID: > + case MALIDP_D32_PRODUCT_ID: > funcs = &d71_chip_funcs; > break; > default: > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h b/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h > index 1727dc993909..81de6a23e7f3 100644 > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h > @@ -72,6 +72,19 @@ > #define GCU_CONTROL_MODE(x) ((x) & 0x7) > #define GCU_CONTROL_SRST BIT(16) > > +/* GCU_CONFIGURATION registers */ > +#define GCU_CONFIGURATION_ID0 0x100 > +#define GCU_CONFIGURATION_ID1 0x104 > + > +/* GCU configuration */ > +#define GCU_MAX_LINE_SIZE(x) ((x) & 0xFFFF) > +#define GCU_MAX_NUM_LINES(x) ((x) >> 16) > +#define GCU_NUM_RICH_LAYERS(x) ((x) & 0x7) > +#define GCU_NUM_PIPELINES(x) (((x) >> 3) & 0x7) > +#define GCU_NUM_SCALERS(x) (((x) >> 6) & 0x7) > +#define GCU_DISPLAY_SPLIT_EN(x) (((x) >> 16) & 0x1) > +#define GCU_DISPLAY_TBU_EN(x) (((x) >> 17) & 0x1) > + > /* GCU opmode */ > #define INACTIVE_MODE 0 > #define TBU_CONNECT_MODE 1 > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c > index b7a1097c45c4..ad38bbc7431e 100644 > --- a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c > @@ -125,6 +125,7 @@ static int komeda_platform_remove(struct platform_device *pdev) > > static const struct of_device_id komeda_of_match[] = { > { .compatible = "arm,mali-d71", .data = d71_identify, }, > + { .compatible = "arm,mali-d32", .data = d71_identify, }, > {}, > }; > >
diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h b/drivers/gpu/drm/arm/display/include/malidp_product.h index 1053b11352eb..16a8a2c22c42 100644 --- a/drivers/gpu/drm/arm/display/include/malidp_product.h +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h @@ -18,7 +18,8 @@ #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF) /* Mali-display product IDs */ -#define MALIDP_D71_PRODUCT_ID 0x0071 +#define MALIDP_D71_PRODUCT_ID 0x0071 +#define MALIDP_D32_PRODUCT_ID 0x0032 union komeda_config_id { struct { diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index b6517c46e670..8a02ade369db 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -1270,7 +1270,7 @@ static int d71_timing_ctrlr_init(struct d71_dev *d71, ctrlr = to_ctrlr(c); - ctrlr->supports_dual_link = true; + ctrlr->supports_dual_link = d71->supports_dual_link; return 0; } diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c index 7e79c2e88421..dd1ecf4276d3 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev *mdev) goto err_cleanup; } - /* probe PERIPH */ + /* Only the legacy HW has the periph block, the newer merges the periph + * into GCU + */ value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO); - if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) { - DRM_ERROR("access blk periph but got blk: %d.\n", - BLOCK_INFO_BLK_TYPE(value)); - err = -EINVAL; - goto err_cleanup; + if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) + d71->periph_addr = NULL; + + if (d71->periph_addr) { + /* probe PERIPHERAL in legacy HW */ + value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID); + + d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048; + d71->max_vsize = 4096; + d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1; + d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN); + d71->integrates_tbu = !!(value & PERIPH_TBU_EN); + } else { + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0); + d71->max_line_size = GCU_MAX_LINE_SIZE(value); + d71->max_vsize = GCU_MAX_NUM_LINES(value); + + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1); + d71->num_rich_layers = GCU_NUM_RICH_LAYERS(value); + d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value); + d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value); } - value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID); - - d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048; - d71->max_vsize = 4096; - d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1; - d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false; - d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false; - for (i = 0; i < d71->num_pipelines; i++) { pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline), &d71_pipeline_funcs); @@ -606,6 +616,7 @@ d71_identify(u32 __iomem *reg_base, struct komeda_chip_info *chip) switch (product_id) { case MALIDP_D71_PRODUCT_ID: + case MALIDP_D32_PRODUCT_ID: funcs = &d71_chip_funcs; break; default: diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h b/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h index 1727dc993909..81de6a23e7f3 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h @@ -72,6 +72,19 @@ #define GCU_CONTROL_MODE(x) ((x) & 0x7) #define GCU_CONTROL_SRST BIT(16) +/* GCU_CONFIGURATION registers */ +#define GCU_CONFIGURATION_ID0 0x100 +#define GCU_CONFIGURATION_ID1 0x104 + +/* GCU configuration */ +#define GCU_MAX_LINE_SIZE(x) ((x) & 0xFFFF) +#define GCU_MAX_NUM_LINES(x) ((x) >> 16) +#define GCU_NUM_RICH_LAYERS(x) ((x) & 0x7) +#define GCU_NUM_PIPELINES(x) (((x) >> 3) & 0x7) +#define GCU_NUM_SCALERS(x) (((x) >> 6) & 0x7) +#define GCU_DISPLAY_SPLIT_EN(x) (((x) >> 16) & 0x1) +#define GCU_DISPLAY_TBU_EN(x) (((x) >> 17) & 0x1) + /* GCU opmode */ #define INACTIVE_MODE 0 #define TBU_CONNECT_MODE 1 diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c index b7a1097c45c4..ad38bbc7431e 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c @@ -125,6 +125,7 @@ static int komeda_platform_remove(struct platform_device *pdev) static const struct of_device_id komeda_of_match[] = { { .compatible = "arm,mali-d71", .data = d71_identify, }, + { .compatible = "arm,mali-d32", .data = d71_identify, }, {}, };
D32 is simple version of D71, the difference is: - Only has one pipeline - Drop the periph block and merge it to GCU v2: Rebase. v3: Isolate the block counting fix to a new patch Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> --- .../drm/arm/display/include/malidp_product.h | 3 +- .../arm/display/komeda/d71/d71_component.c | 2 +- .../gpu/drm/arm/display/komeda/d71/d71_dev.c | 39 ++++++++++++------- .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 +++++++ .../gpu/drm/arm/display/komeda/komeda_drv.c | 1 + 5 files changed, 42 insertions(+), 16 deletions(-)