From patchwork Wed Dec 18 22:35:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 11302349 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D88114B7 for ; Wed, 18 Dec 2019 22:36:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B7BC2176D for ; Wed, 18 Dec 2019 22:36:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="db+TBlr6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0B7BC2176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4E2A6EA8F; Wed, 18 Dec 2019 22:36:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) by gabe.freedesktop.org (Postfix) with ESMTPS id A901B6EA8F for ; Wed, 18 Dec 2019 22:35:59 +0000 (UTC) Received: by mail-pg1-x544.google.com with SMTP id s64so2021637pgb.9 for ; Wed, 18 Dec 2019 14:35:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+oRMrQvnKv8sUjeUK0UWacEw5OuTlAMvQh07s4c6q20=; b=db+TBlr64EdEwBEdMs7w/Pv0H3tuG2jAw41a3OXASqoAZL0EYUaWZ8HDZIfe49qvZA pFTHJMOSZ1DUHo6yp0wOMGWXQci8BN/9/nnoGHSnTOEwQ8aHsf+528NQ2yhrN+P9x6GK XVrBd6FxIvat+vm+Zie433PrCuTb46Gkq0JC0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+oRMrQvnKv8sUjeUK0UWacEw5OuTlAMvQh07s4c6q20=; b=pJRpbWH/7QAd8b99/9uGlhknWIcZ8h/DgzGAR6DaeZPzhiZ263iwVN5pnsWeQU9n74 QFSQPhWt51xJcAuRIyVWi2Vk91qPmOIwj0TzIOh2J89stobvxuY3saFdzh0q/1nEjGXM x3WSaQsQaWZeIu+dUY2xb09cBsi3hbfD1tiYqsOrg74ab3iJchbwjOFjtPvHRNLZGrOb BBLQQDs5ODiVWr3IsuFlT4dygwQmaRuMboIdpsYA4n9wFh95aV1+T+toepYDYKUsyyiS Ik6FzHjvbt+3Oi0jYAjdm1kiwLfEr2F7vvIIB/8Zx2eFL0FTOrja+uJ4qFPQ5YhwZSzV 9gPA== X-Gm-Message-State: APjAAAUf+ZindRnDfcES7mkFJ8wKBbp5Gt1Iq7bGhQjOkowx7fx3evgU tCH2j4tTKBWqulBta545j9O0+A== X-Google-Smtp-Source: APXvYqyxaHyGUjuepnVu3CFb1Nbl4hMcUXmhJvEcO3i8W028D3on1sqc1halTkAOiHuxndTpK4WDwA== X-Received: by 2002:aa7:85d3:: with SMTP id z19mr5797968pfn.62.1576708559241; Wed, 18 Dec 2019 14:35:59 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id i9sm4709919pfk.24.2019.12.18.14.35.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 14:35:58 -0800 (PST) From: Douglas Anderson To: Andrzej Hajda , Neil Armstrong Subject: [PATCH v3 1/9] drm/bridge: ti-sn65dsi86: Split the setting of the dp and dsi rates Date: Wed, 18 Dec 2019 14:35:22 -0800 Message-Id: <20191218143416.v3.1.Icb765d5799e9651e5249c0c27627ba33a9e411cf@changeid> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20191218223530.253106-1-dianders@chromium.org> References: <20191218223530.253106-1-dianders@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robdclark@chromium.org, Jernej Skrabec , Jeffrey Hugo , David Airlie , linux-arm-msm@vger.kernel.org, Jonas Karlman , Douglas Anderson , dri-devel@lists.freedesktop.org, bjorn.andersson@linaro.org, seanpaul@chromium.org, Laurent Pinchart , linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" These two things were in one function. Split into two. This looks like it's duplicating some code, but don't worry. This is is just in preparation for future changes. This is intended to have zero functional change and will just make future patches easier to understand. Signed-off-by: Douglas Anderson Tested-by: Rob Clark Reviewed-by: Rob Clark Reviewed-by: Bjorn Andersson --- Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/ti-sn65dsi86.c | 33 +++++++++++++++++++-------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 43abf01ebd4c..2fb9370a76e6 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -417,6 +417,24 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn_bridge *pdata) REFCLK_FREQ(i)); } +static void ti_sn_bridge_set_dsi_rate(struct ti_sn_bridge *pdata) +{ + unsigned int bit_rate_mhz, clk_freq_mhz; + unsigned int val; + struct drm_display_mode *mode = + &pdata->bridge.encoder->crtc->state->adjusted_mode; + + /* set DSIA clk frequency */ + bit_rate_mhz = (mode->clock / 1000) * + mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); + clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); + + /* for each increment in val, frequency increases by 5MHz */ + val = (MIN_DSI_CLK_FREQ_MHZ / 5) + + (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); + regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); +} + /** * LUT index corresponds to register value and * LUT values corresponds to dp data rate supported @@ -426,22 +444,16 @@ static const unsigned int ti_sn_bridge_dp_rate_lut[] = { 0, 1620, 2160, 2430, 2700, 3240, 4320, 5400 }; -static void ti_sn_bridge_set_dsi_dp_rate(struct ti_sn_bridge *pdata) +static void ti_sn_bridge_set_dp_rate(struct ti_sn_bridge *pdata) { - unsigned int bit_rate_mhz, clk_freq_mhz, dp_rate_mhz; - unsigned int val, i; + unsigned int bit_rate_mhz, dp_rate_mhz; + unsigned int i; struct drm_display_mode *mode = &pdata->bridge.encoder->crtc->state->adjusted_mode; /* set DSIA clk frequency */ bit_rate_mhz = (mode->clock / 1000) * mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); - clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); - - /* for each increment in val, frequency increases by 5MHz */ - val = (MIN_DSI_CLK_FREQ_MHZ / 5) + - (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); - regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); /* set DP data rate */ dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) / @@ -510,7 +522,8 @@ static void ti_sn_bridge_enable(struct drm_bridge *bridge) val); /* set dsi/dp clk frequency value */ - ti_sn_bridge_set_dsi_dp_rate(pdata); + ti_sn_bridge_set_dsi_rate(pdata); + ti_sn_bridge_set_dp_rate(pdata); /* enable DP PLL */ regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1);