From patchwork Mon Mar 2 10:31:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roman Stratiienko X-Patchwork-Id: 11417369 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EA5BA14B7 for ; Tue, 3 Mar 2020 08:24:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C8F02208C3 for ; Tue, 3 Mar 2020 08:24:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="MBzdb3+4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C8F02208C3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8563F6E9DF; Tue, 3 Mar 2020 08:24:09 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by gabe.freedesktop.org (Postfix) with ESMTPS id 19B486E27A for ; Mon, 2 Mar 2020 10:32:31 +0000 (UTC) Received: by mail-lf1-x142.google.com with SMTP id 83so7567029lfh.9 for ; Mon, 02 Mar 2020 02:32:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uLIaYc1loUOAm4+uaD8q8oswzLA6rRb7RCx9g07PJYY=; b=MBzdb3+4hisLETfeMWwX64k7SKGvbtMnVn0gvRNrPJ/yOT8xOaVoRAw38w9Q33DZSj LbjFcT/5pUq4iYaS+RY+bW1hZcfUYHcKgYS2d2WPBdrADHT5MWzHtchifYkyw5QpiWWp Z11Rcyb4HptVPnNdttcwxL9zrJ31x3+vv04R9Uiw+jH2aTe3FVXzV4Yj0AxedG+LmzMX JG1DmLbZVM7nOw+sAjakxcA1rGGpjjLv5cBCgyVqCqSoBoD2KkeHAHkLFQY1tCNmTvzR O9okeWvAxznl5m1nFE/eFvvkNcofZVjpcTqGYseKxAfGJgKJBtgmzMtb5bQ9aHDn7/6z yAZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uLIaYc1loUOAm4+uaD8q8oswzLA6rRb7RCx9g07PJYY=; b=BqdIMHGoNiJL9jHLL7B/KhKkMfVsBJ8BP5uTX3XTVsE6pY50JWvUQZnZyR8FCv5ZKi SQW5tkmwMxkWGy/WpFG+v9/xP0Jvcsktgq3y8XlTKtZ0iSKawZbFE6Lcn9BviW+750Mr HoEPTilOGCVEHbjL0pBhr2+0yPWsGigWil3bgVzQQTWvHImcJFSmDV7ldyjZUgFuFOGI VWPDOlW4hoCXUDXxectRcmkesoh5y3VXknw3j6kiwIgx9SxiAe12TI31m/4PumyyW0l0 +4vxk/yji6fZTl1mEWZqO5FRDweUwPQ69OTqX9JNe5c27DR7JoeTTU0LNYQTQqrsbvAU C7xw== X-Gm-Message-State: ANhLgQ3RBmy9z7XBSTwfUQITD327JdBaFZTIY0QQsegyPSxiqPe0YUJz ggTpZ19RcK7o3ny8gJFsbh4= X-Google-Smtp-Source: ADFU+vtJQp2Aual2mzj/p6gUCjWYgeBfy1s6+U068zXpnJ/8pgXDb7KT5vxx/IM3Duh5s4e4SQqwbw== X-Received: by 2002:a19:4f4e:: with SMTP id a14mr10315202lfk.175.1583145149536; Mon, 02 Mar 2020 02:32:29 -0800 (PST) Received: from localhost.localdomain ([149.255.131.2]) by smtp.gmail.com with ESMTPSA id n21sm3895328lfh.2.2020.03.02.02.32.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Mar 2020 02:32:29 -0800 (PST) From: Roman Stratiienko To: jernej.skrabec@siol.net, mripard@kernel.org, wens@csie.org Subject: [PATCH v4 2/4] drm/sun4i: Add alpha property for sun8i and sun50i VI layer Date: Mon, 2 Mar 2020 12:31:36 +0200 Message-Id: <20200302103138.17916-3-r.stratiienko@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200302103138.17916-1-r.stratiienko@gmail.com> References: <.> <20200302103138.17916-1-r.stratiienko@gmail.com> X-Mailman-Approved-At: Tue, 03 Mar 2020 08:24:06 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: airlied@linux.ie, Roman Stratiienko , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" DE3.0 VI layers supports plane-global alpha channel. DE2.0 FCC block have GLOBAL_ALPHA register that can be used as alpha source for blender. Add alpha property to the DRM plane and connect it to the corresponding registers in the mixer. Do not add alpha property for V3s SOC that have DE2.0 and 2 VI planes. Signed-off-by: Roman Stratiienko Reviewed-by: Jernej Skrabec --- v2: Initial version by mistake v3: - Skip adding & applying alpha property if VI count > 1 V4: - Changed author e-mail address to avoid mail rejecting - Picked reviewed-by line --- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 48 +++++++++++++++++++++----- drivers/gpu/drm/sun4i/sun8i_vi_layer.h | 11 ++++++ 2 files changed, 51 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 2344938be3e4..f2469b5e97ee 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -65,6 +65,36 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, } } +static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, + int overlay, struct drm_plane *plane) +{ + u32 mask, val, ch_base; + + ch_base = sun8i_channel_base(mixer, channel); + + if (mixer->cfg->is_de3) { + mask = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK | + SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK; + val = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA + (plane->state->alpha >> 8); + + val |= (plane->state->alpha == DRM_BLEND_ALPHA_OPAQUE) ? + SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL : + SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED; + + regmap_update_bits(mixer->engine.regs, + SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, + overlay), + mask, val); + } else if (mixer->cfg->vi_num == 1) { + regmap_update_bits(mixer->engine.regs, + SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG, + SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK, + SUN8I_MIXER_FCC_GLOBAL_ALPHA + (plane->state->alpha >> 8)); + } +} + static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane, unsigned int zpos) @@ -248,14 +278,6 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val); - /* It seems that YUV formats use global alpha setting. */ - if (mixer->cfg->is_de3) - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, - overlay), - SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK, - SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(0xff)); - return 0; } @@ -373,6 +395,8 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, sun8i_vi_layer_update_coord(mixer, layer->channel, layer->overlay, plane, zpos); + sun8i_vi_layer_update_alpha(mixer, layer->channel, + layer->overlay, plane); sun8i_vi_layer_update_formats(mixer, layer->channel, layer->overlay, plane); sun8i_vi_layer_update_buffer(mixer, layer->channel, @@ -472,6 +496,14 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; + if (mixer->cfg->vi_num == 1 || mixer->cfg->is_de3) { + ret = drm_plane_create_alpha_property(&layer->plane); + if (ret) { + dev_err(drm->dev, "Couldn't add alpha property\n"); + return ERR_PTR(ret); + } + } + ret = drm_plane_create_zpos_property(&layer->plane, index, 0, plane_cnt - 1); if (ret) { diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h index eaa6076f5dbc..48c399e1c86d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h @@ -29,14 +29,25 @@ #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \ ((base) + 0xfc) +#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG \ + (0xAA000 + 0x90) + +#define SUN8I_MIXER_FCC_GLOBAL_ALPHA(x) ((x) << 24) +#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK GENMASK(31, 24) + #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN BIT(0) /* RGB mode should be set for RGB formats and cleared for YCbCr */ #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE BIT(15) #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET 8 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK GENMASK(12, 8) +#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) #define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24) #define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x) ((x) << 24) +#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL ((0) << 1) +#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_LAYER ((1) << 1) +#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED ((2) << 1) + #define SUN8I_MIXER_CHAN_VI_DS_N(x) ((x) << 16) #define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0)