Message ID | 20200302203452.17977-7-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/panel: Fix dotclocks | expand |
Hello Ville Syrjala, Am 02.03.2020 um 21:34 schrieb Ville Syrjala: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The currently listed dotclock disagrees with the currently > listed vrefresh rate. Change the dotclock to match the vrefresh. > > Someone tell me which (if either) of the dotclock or vreresh is > correct? Your clock fix is correct, thanks! > > Cc: Heiko Schocher <hs@denx.de> > Cc: Thierry Reding <treding@nvidia.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/panel/panel-lg-lg4573.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Heiko Schocher <hs@denx.de> bye, Heiko
On Tue, Mar 03, 2020 at 06:24:25AM +0100, Heiko Schocher wrote: > Hello Ville Syrjala, > > Am 02.03.2020 um 21:34 schrieb Ville Syrjala: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > The currently listed dotclock disagrees with the currently > > listed vrefresh rate. Change the dotclock to match the vrefresh. > > > > Someone tell me which (if either) of the dotclock or vreresh is > > correct? > > Your clock fix is correct, thanks! > > > > > Cc: Heiko Schocher <hs@denx.de> > > Cc: Thierry Reding <treding@nvidia.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/panel/panel-lg-lg4573.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > Reviewed-by: Heiko Schocher <hs@denx.de> Thanks. Pushed to drm-misc-next.
diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c index b262b53dbd85..5907f2503755 100644 --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c @@ -197,7 +197,7 @@ static int lg4573_enable(struct drm_panel *panel) } static const struct drm_display_mode default_mode = { - .clock = 27000, + .clock = 28341, .hdisplay = 480, .hsync_start = 480 + 10, .hsync_end = 480 + 10 + 59,