From patchwork Wed Mar 25 17:31:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11459559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7F5AB159A for ; Thu, 26 Mar 2020 08:09:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6893020719 for ; Thu, 26 Mar 2020 08:09:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6893020719 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 361F36E88B; Thu, 26 Mar 2020 08:08:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by gabe.freedesktop.org (Postfix) with ESMTPS id 423006E0C4 for ; Wed, 25 Mar 2020 17:31:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 10A462969FA From: Enric Balletbo i Serra To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com Subject: [RESEND PATCH v12 2/5] dt-bindings: mediatek: Update mmsys binding to reflect it is a system controller Date: Wed, 25 Mar 2020 18:31:20 +0100 Message-Id: <20200325173123.3569606-3-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200325173123.3569606-1-enric.balletbo@collabora.com> References: <20200325173123.3569606-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 26 Mar 2020 08:08:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kate Stewart , Andrew-CT Chen , Minghsiu Tsai , dri-devel@lists.freedesktop.org, Richard Fontana , Collabora Kernel ML , linux-clk@vger.kernel.org, Weiyi Lu , wens@csie.org, linux-arm-kernel@lists.infradead.org, mtk01761 , linux-media@vger.kernel.org, devicetree@vger.kernel.org, frank-w@public-files.de, Seiya Wang , sean.wang@mediatek.com, Houlong Wei , linux-mediatek@lists.infradead.org, hsinyi@chromium.org, Matthias Brugger , Thomas Gleixner , Mauro Carvalho Chehab , Allison Randal , Matthias Brugger , Greg Kroah-Hartman , rdunlap@infradead.org, linux-kernel@vger.kernel.org, matthias.bgg@kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The mmsys system controller is not only a pure clock controller, so update the binding documentation to reflect that apart from providing clocks, it also provides routing and miscellaneous control registers. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Matthias Brugger Reviewed-by: CK Hu --- Changes in v12: None Changes in v10: - Update the binding documentation for the mmsys system controller. Changes in v9: None Changes in v8: None Changes in v7: None .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 301eefbe1618..8d6a9d98e7a6 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -1,7 +1,8 @@ Mediatek mmsys controller ============================ -The Mediatek mmsys controller provides various clocks to the system. +The Mediatek mmsys system controller provides clock control, routing control, +and miscellaneous control in mmsys partition. Required Properties: @@ -15,13 +16,13 @@ Required Properties: - "mediatek,mt8183-mmsys", "syscon" - #clock-cells: Must be 1 -The mmsys controller uses the common clk binding from +For the clock control, the mmsys controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt The available clocks are defined in dt-bindings/clock/mt*-clk.h. Example: -mmsys: clock-controller@14000000 { +mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>;