diff mbox series

drm: Correct DP DSC macro typo

Message ID 20200429184142.1867987-1-Rodrigo.Siqueira@amd.com (mailing list archive)
State New, archived
Headers show
Series drm: Correct DP DSC macro typo | expand

Commit Message

Rodrigo Siqueira Jordao April 29, 2020, 6:41 p.m. UTC
In the file drm_dp_helper.h we have a macro named
DP_DSC_THROUGHPUT_MODE_{0,1}_UPSUPPORTED, the correct name should be
DP_DSC_THROUGHPUT_MODE_{0,1}_UNSUPPORTED. This commits adjusts this typo
in the header file and in other places that attempt to access this
macro.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 2 +-
 include/drm/drm_dp_helper.h                 | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

Comments

Harry Wentland April 29, 2020, 6:43 p.m. UTC | #1
On 2020-04-29 2:41 p.m., Rodrigo Siqueira wrote:
> In the file drm_dp_helper.h we have a macro named
> DP_DSC_THROUGHPUT_MODE_{0,1}_UPSUPPORTED, the correct name should be
> DP_DSC_THROUGHPUT_MODE_{0,1}_UNSUPPORTED. This commits adjusts this typo
> in the header file and in other places that attempt to access this
> macro.
> 
> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 2 +-
>  include/drm/drm_dp_helper.h                 | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
> index 87d682d25278..0ea6662a1563 100644
> --- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
> @@ -129,7 +129,7 @@ static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *lin
>  static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput)
>  {
>  	switch (dpcd_throughput) {
> -	case DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED:
> +	case DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED:
>  		*throughput = 0;
>  		break;
>  	case DP_DSC_THROUGHPUT_MODE_0_170:
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c6119e4c169a..fd7ac8f15004 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -292,7 +292,7 @@
>  #define DP_DSC_PEAK_THROUGHPUT              0x06B
>  # define DP_DSC_THROUGHPUT_MODE_0_MASK      (0xf << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_SHIFT     0
> -# define DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED 0
> +# define DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED 0
>  # define DP_DSC_THROUGHPUT_MODE_0_340       (1 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_400       (2 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_450       (3 << 0)
> @@ -310,7 +310,7 @@
>  # define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 0) /* 1.4a */
>  # define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
>  # define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
> -# define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0
> +# define DP_DSC_THROUGHPUT_MODE_1_UNSUPPORTED 0
>  # define DP_DSC_THROUGHPUT_MODE_1_340       (1 << 4)
>  # define DP_DSC_THROUGHPUT_MODE_1_400       (2 << 4)
>  # define DP_DSC_THROUGHPUT_MODE_1_450       (3 << 4)
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
index 87d682d25278..0ea6662a1563 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
@@ -129,7 +129,7 @@  static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *lin
 static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput)
 {
 	switch (dpcd_throughput) {
-	case DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED:
+	case DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED:
 		*throughput = 0;
 		break;
 	case DP_DSC_THROUGHPUT_MODE_0_170:
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c6119e4c169a..fd7ac8f15004 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -292,7 +292,7 @@ 
 #define DP_DSC_PEAK_THROUGHPUT              0x06B
 # define DP_DSC_THROUGHPUT_MODE_0_MASK      (0xf << 0)
 # define DP_DSC_THROUGHPUT_MODE_0_SHIFT     0
-# define DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED 0
+# define DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED 0
 # define DP_DSC_THROUGHPUT_MODE_0_340       (1 << 0)
 # define DP_DSC_THROUGHPUT_MODE_0_400       (2 << 0)
 # define DP_DSC_THROUGHPUT_MODE_0_450       (3 << 0)
@@ -310,7 +310,7 @@ 
 # define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 0) /* 1.4a */
 # define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
 # define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
-# define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0
+# define DP_DSC_THROUGHPUT_MODE_1_UNSUPPORTED 0
 # define DP_DSC_THROUGHPUT_MODE_1_340       (1 << 4)
 # define DP_DSC_THROUGHPUT_MODE_1_400       (2 << 4)
 # define DP_DSC_THROUGHPUT_MODE_1_450       (3 << 4)