From patchwork Sun May 10 12:08:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paul Menzel X-Patchwork-Id: 11539797 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B8EE115E6 for ; Mon, 11 May 2020 07:18:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A14D52082E for ; Mon, 11 May 2020 07:18:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A14D52082E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=molgen.mpg.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9EBD56E24D; Mon, 11 May 2020 07:17:32 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx1.molgen.mpg.de (mx3.molgen.mpg.de [141.14.17.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2566F6E160; Sun, 10 May 2020 12:08:49 +0000 (UTC) Received: from hopp.molgen.mpg.de (hopp.molgen.mpg.de [141.14.25.186]) by mx.molgen.mpg.de (Postfix) with ESMTP id BFC4C2002EE02; Sun, 10 May 2020 14:08:47 +0200 (CEST) From: Paul Menzel To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/3] gpu/drm: Fix spelling of *frequency* Date: Sun, 10 May 2020 14:08:34 +0200 Message-Id: <20200510120835.32054-2-pmenzel@molgen.mpg.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200510120835.32054-1-pmenzel@molgen.mpg.de> References: <20200510120835.32054-1-pmenzel@molgen.mpg.de> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 11 May 2020 07:17:27 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Menzel , Sean Paul , amd-gfx@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fix all occurrences with the command below. git grep -l frequencey | xargs sed -i 's/frequencey/frequency/g' Cc: Rob Clark Cc: Sean Paul Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Alex Deucher Cc: Christian König Cc: David (ChunMing) Zhou Cc: amd-gfx@lists.freedesktop.org Signed-off-by: Paul Menzel --- drivers/gpu/drm/amd/include/atombios.h | 4 ++-- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- drivers/gpu/drm/radeon/atombios.h | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h index afef574c3b88b..7fe1d0d66701c 100644 --- a/drivers/gpu/drm/amd/include/atombios.h +++ b/drivers/gpu/drm/amd/include/atombios.h @@ -6138,7 +6138,7 @@ ucLVDSOffToOnDelay_in4Ms: LVDS power down sequence time in unit of 4ms. ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is customer platform specific parameters. By default it is 0. -ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB pstate. +ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB pstate. **********************************************************************************************************************/ @@ -6346,7 +6346,7 @@ ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is custom ulLCDBitDepthControlVal: GPU display control encoder bit dither control setting, used to program register mmFMT_BIT_DEPTH_CONTROL -ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB P-State(P0, P1, P2 & P3). +ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB P-State(P0, P1, P2 & P3). ulNbpStateNClkFreq[4]: NB P-State NClk frequency in different NB P-State usNBPStateVoltage[4]: NB P-State (P0/P1 & P2/P3) voltage; NBP3 refers to lowes voltage usBootUpNBVoltage: NB P-State voltage during boot up before driver loaded diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 11ae5b8444c32..7b50c2b7af74f 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -743,7 +743,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi) * esc clock is byte clock followed by a 4 bit divider, * we need to find an escape clock frequency within the * mipi DSI spec range within the maximum divider limit - * We iterate here between an escape clock frequencey + * We iterate here between an escape clock frequency * between 20 Mhz to 5 Mhz and pick up the first one * that can be supported by our divider */ diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index 4d0f6de32957f..b9d7d54e537cf 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h @@ -5206,7 +5206,7 @@ ucLVDSOffToOnDelay_in4Ms: LVDS power down sequence time in unit of 4ms. ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is customer platform specific parameters. By default it is 0. -ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB pstate. +ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB pstate. **********************************************************************************************************************/ @@ -5413,7 +5413,7 @@ ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is custom ulLCDBitDepthControlVal: GPU display control encoder bit dither control setting, used to program register mmFMT_BIT_DEPTH_CONTROL -ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB P-State(P0, P1, P2 & P3). +ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB P-State(P0, P1, P2 & P3). ulNbpStateNClkFreq[4]: NB P-State NClk frequency in different NB P-State usNBPStateVoltage[4]: NB P-State (P0/P1 & P2/P3) voltage; NBP3 refers to lowes voltage usBootUpNBVoltage: NB P-State voltage during boot up before driver loaded