From patchwork Sun May 10 16:55:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= X-Patchwork-Id: 11539831 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71567912 for ; Mon, 11 May 2020 07:18:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4FDBB206D5 for ; Mon, 11 May 2020 07:18:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CsDrppTO" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4FDBB206D5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B383F6E23F; Mon, 11 May 2020 07:18:06 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id 67ED389FED for ; Sun, 10 May 2020 16:55:58 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id i15so7924095wrx.10 for ; Sun, 10 May 2020 09:55:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K/boFoUXaAgzs/9YRn/4qwyX/v1A/ZjToMiKSYzOwF0=; b=CsDrppTOIM1X8NLMAVH0m3CI9obn/4avW1sQrIKdscbA7S1vz0D5jaYiKPtt8AFN2c TPZ/3TRlrdUr+GRjCbCwJCWYOxOzw/IhiVFQp+KP/VPrKJXeOYNPQ+aZuC6zm3Sd65KR rhkc7cs3FBbPQAaAJ+Uq4k95gzdIX+zjTtGitOybYxTQE4qzEOcrr9p016MOfFfWVPFB C+vvtj6cGmwKoo8lxNEEcny94OGwyjQsjSAPjNm7HzL6rm69KqHLZtKOyUYEIBNBiB4i zja+XFUgqvVVDW12fow/JWywZgPXmBqDNL1bX/yR/61o9SwY8fcV03uALOl2ojejgG5C +E5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K/boFoUXaAgzs/9YRn/4qwyX/v1A/ZjToMiKSYzOwF0=; b=jyOeayxDEn/xpKz5x9p9HzFYts9s8szSRJnaPj50EFGpmxL4BRpDmo4fWIHRZ+fOSx sP+l912yN/ifnoJ47EcIqDc0BT7jTk0W7ffUvNripDkZm8IR5f+/1DBI8FnuHBSuzj11 llTEa3dFjU/FDRKw13idolfss7jwhajOHTSa61nij9sCHLSFtwrC5GrKzFss5pRv9OD7 LbnwXfV8/JaMkzCFN1+M+l8U5o0qxLQd/HEqleVLPn5gq7bsJguTQa14AAPkhoyLPTWr pTS1r4/5/8IRApi7dUJtrZT79du6YesbfnoGdMevcY6/ctBtvA2rW/cceXo0jlTDDx8y IDvA== X-Gm-Message-State: AGi0PuZUIMAL3yAzJlg1JlU0dCoMMn9VIizhLeAY3dm/Q0r0JFrhLQGP Q+AFyATimijRQqGx2tnV+Mw= X-Google-Smtp-Source: APiQypKxxgw1gHTSXE0R2uidSfFJNoUSdztA5pN6FNFmbebfe2j6K8LCVB8QZ+7yVeNP4+OkgKQkcA== X-Received: by 2002:adf:81e4:: with SMTP id 91mr14909020wra.143.1589129756971; Sun, 10 May 2020 09:55:56 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:1f1:d0f0:1cc8:b1f1:a2b8:a1ee]) by smtp.gmail.com with ESMTPSA id g15sm13637670wrp.96.2020.05.10.09.55.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 May 2020 09:55:56 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , Viresh Kumar , Nishanth Menon , Stephen Boyd , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH 14/15] [DO NOT MERGE] arm64: dts: allwinner: h6: Add GPU OPP table Date: Sun, 10 May 2020 18:55:37 +0200 Message-Id: <20200510165538.19720-15-peron.clem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200510165538.19720-1-peron.clem@gmail.com> References: <20200510165538.19720-1-peron.clem@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 11 May 2020 07:17:28 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add an Operating Performance Points table for the GPU to enable Dynamic Voltage & Frequency Scaling on the H6. The voltage range is set with minival voltage set to the target and the maximal voltage set to 1.2V. This allow DVFS framework to work properly on board with fixed regulator. Signed-off-by: Clément Péron --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80 ++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index b26f735201c7..85f43a4b651f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -173,6 +173,7 @@ clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; clock-names = "core", "bus"; resets = <&ccu RST_BUS_GPU>; + operating-points-v2 = <&gpu_opp_table>; #cooling-cells = <2>; status = "disabled"; }; @@ -1026,4 +1027,83 @@ }; }; }; + + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp@216000000 { + opp-hz = /bits/ 64 <216000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@264000000 { + opp-hz = /bits/ 64 <264000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@312000000 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@336000000 { + opp-hz = /bits/ 64 <336000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@360000000 { + opp-hz = /bits/ 64 <360000000>; + opp-microvolt = <820000 820000 1200000>; + }; + + opp@384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt = <830000 830000 1200000>; + }; + + opp@408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <840000 840000 1200000>; + }; + + opp@420000000 { + opp-hz = /bits/ 64 <420000000>; + opp-microvolt = <850000 850000 1200000>; + }; + + opp@432000000 { + opp-hz = /bits/ 64 <432000000>; + opp-microvolt = <860000 860000 1200000>; + }; + + opp@456000000 { + opp-hz = /bits/ 64 <456000000>; + opp-microvolt = <870000 870000 1200000>; + }; + + opp@504000000 { + opp-hz = /bits/ 64 <504000000>; + opp-microvolt = <890000 890000 1200000>; + }; + + opp@540000000 { + opp-hz = /bits/ 64 <540000000>; + opp-microvolt = <910000 910000 1200000>; + }; + + opp@576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-microvolt = <930000 930000 1200000>; + }; + + opp@624000000 { + opp-hz = /bits/ 64 <624000000>; + opp-microvolt = <950000 950000 1200000>; + }; + + opp@756000000 { + opp-hz = /bits/ 64 <756000000>; + opp-microvolt = <1040000 1040000 1200000>; + }; + }; };