| Message ID | 20200529163200.18031-5-s.nawrocki@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Exynos: Simple QoS for exynos-bus using interconnect | expand |
Hi Sylwester, On Sat, May 30, 2020 at 1:33 AM Sylwester Nawrocki <s.nawrocki@samsung.com> wrote: > > This patch adds the following properties for Exynos4412 interconnect > bus nodes: > - samsung,interconnect-parent: to declare connections between > nodes in order to guarantee PM QoS requirements between nodes; > - #interconnect-cells: required by the interconnect framework. > > Note that #interconnect-cells is always zero and node IDs are not > hardcoded anywhere. > > Signed-off-by: Artur Świgoń <a.swigon@samsung.com> > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > --- > Changes for v5: > - adjust to renamed exynos,interconnect-parent-node property, > - add properties in common exynos4412.dtsi file rather than > in Odroid specific odroid4412-odroid-common.dtsi. > --- > arch/arm/boot/dts/exynos4412.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi > index 4886894..a7496d3 100644 > --- a/arch/arm/boot/dts/exynos4412.dtsi > +++ b/arch/arm/boot/dts/exynos4412.dtsi > @@ -381,6 +381,7 @@ > clocks = <&clock CLK_DIV_DMC>; > clock-names = "bus"; > operating-points-v2 = <&bus_dmc_opp_table>; > + #interconnect-cells = <0>; > status = "disabled"; > }; > > @@ -450,6 +451,8 @@ > clocks = <&clock CLK_DIV_GDL>; > clock-names = "bus"; > operating-points-v2 = <&bus_leftbus_opp_table>; > + samsung,interconnect-parent = <&bus_dmc>; > + #interconnect-cells = <0>; > status = "disabled"; > }; > > @@ -466,6 +469,8 @@ > clocks = <&clock CLK_ACLK160>; > clock-names = "bus"; > operating-points-v2 = <&bus_display_opp_table>; > + samsung,interconnect-parent = <&bus_leftbus>; > + #interconnect-cells = <0>; > status = "disabled"; > }; > > -- > 2.7.4 > Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 4886894..a7496d3 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -381,6 +381,7 @@ clocks = <&clock CLK_DIV_DMC>; clock-names = "bus"; operating-points-v2 = <&bus_dmc_opp_table>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -450,6 +451,8 @@ clocks = <&clock CLK_DIV_GDL>; clock-names = "bus"; operating-points-v2 = <&bus_leftbus_opp_table>; + samsung,interconnect-parent = <&bus_dmc>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -466,6 +469,8 @@ clocks = <&clock CLK_ACLK160>; clock-names = "bus"; operating-points-v2 = <&bus_display_opp_table>; + samsung,interconnect-parent = <&bus_leftbus>; + #interconnect-cells = <0>; status = "disabled"; };