| Message ID | 20200608104832.3.Ib616e311c48cc64b2cef11bd54d4a9cedc874bb1@changeid (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/bridge: ti-sn65dsi86: Don't compile GPIO bits if not CONFIG_OF_GPIO | expand |
Quoting Douglas Anderson (2020-06-08 10:48:34) > This fixes a kernel doc warning due to a typo: > warning: Function parameter or member 'ln_polrs' not described in 'ti_sn_bridge' > > Fixes: 5bebaeadb30e ("drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity") > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index fca7c2a0bcf9..1080e4f9df96 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -122,7 +122,7 @@ * @supplies: Data for bulk enabling/disabling our regulators. * @dp_lanes: Count of dp_lanes we're using. * @ln_assign: Value to program to the LN_ASSIGN register. - * @ln_polr: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG. + * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG. * * @gchip: If we expose our GPIOs, this is used. * @gchip_output: A cache of whether we've set GPIOs to output. This
This fixes a kernel doc warning due to a typo: warning: Function parameter or member 'ln_polrs' not described in 'ti_sn_bridge' Fixes: 5bebaeadb30e ("drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity") Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)