From patchwork Fri Jul 10 23:46:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 11661803 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DBDC81510 for ; Tue, 14 Jul 2020 07:06:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B9E9C2076D for ; Tue, 14 Jul 2020 07:06:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=marek-ca.20150623.gappssmtp.com header.i=@marek-ca.20150623.gappssmtp.com header.b="eYAwhWaJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B9E9C2076D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=marek.ca Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 26FB46E94A; Tue, 14 Jul 2020 07:02:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qt1-x842.google.com (mail-qt1-x842.google.com [IPv6:2607:f8b0:4864:20::842]) by gabe.freedesktop.org (Postfix) with ESMTPS id A263D6E1CF for ; Fri, 10 Jul 2020 23:48:41 +0000 (UTC) Received: by mail-qt1-x842.google.com with SMTP id e12so5828284qtr.9 for ; Fri, 10 Jul 2020 16:48:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=t/YUPoYzKITfDRzsXGJatP7SfG3rVssKgCHkA7GTohk=; b=eYAwhWaJ6WDKsAeNjbE1T4jAoNeQvKsUZeTvCp8ns6BMvwS0hwrwZKV+6XOf+nNJti Lpe59v5ImqrCcINafcGaQ0bo218sU+ErcZZsRv1fCcRt2yLs3hZUdWeNO9mElRUU+Qrl O6y4dSr2BiS+GV89YTk3BhqWA7F53R3Br+wJQuEBGgm5DVGK1/01KEHYZP4UbAJmcPsN ud39xyg834rrFWidgseEH9yraqph8NO70ANmP/5V4KtoU479tFahKBRV8YOLStsVHSbm fuE9Mq6wECwz7f/Y/YwweIeSxFt0qs3JQw0uyj0FR8pFOouoEH98ZSliZkVtPOqkx3ai 6ncw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=t/YUPoYzKITfDRzsXGJatP7SfG3rVssKgCHkA7GTohk=; b=hCSUduUbF331vnk7WJC45nME08pyFe2YiKquOUDW+Ohn5Of2A1FSICR9WlOP7kShai X1zi2OGxJpbWfj/EK96txh726GnJDRfLoNXSZhP2LIkCU67gy4PPNE2j33pXH1qE52Ba Ui5ZO4Wl5FZ2yi2tH3QRpHUNuAvb+Gc3d0eS3HtUPLN1Ff50Nf1qq0SLBcL0D/RW79qQ 2QY1CL2dH+hKjUIYtHF3dGSs3LhoOMCBOvj5RJxrFZw4SPbb7IV7WL+lqy+2hQLnu/V+ gpcfaKP2MtGIHlEsQz0GAupvvFJRdUTS62VFMs29jUzrcCoJkIK9HqG/ycZJXcvWcR2P 7LzQ== X-Gm-Message-State: AOAM532PQaoDffGyXLdmXBGKZrVxswsX/9WzJ6vxdkyijM6NN7sHK3ko v3GOvCyTo9yl/Y8DMV2NX592Mw== X-Google-Smtp-Source: ABdhPJxhZjKQWe+OqU9wPzwkTAH61T7D/arAMYpcR4qQS1FLyaMhKAFet8ytZDC2n7ZqGkQxMFsXKg== X-Received: by 2002:ac8:734b:: with SMTP id q11mr28185535qtp.176.1594424920735; Fri, 10 Jul 2020 16:48:40 -0700 (PDT) Received: from localhost.localdomain ([147.253.86.153]) by smtp.gmail.com with ESMTPSA id a185sm8937187qkg.3.2020.07.10.16.48.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2020 16:48:40 -0700 (PDT) From: Jonathan Marek To: freedreno@lists.freedesktop.org Subject: [PATCH v3] drm/msm: handle for EPROBE_DEFER for of_icc_get Date: Fri, 10 Jul 2020 19:46:55 -0400 Message-Id: <20200710234657.30944-1-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 14 Jul 2020 07:02:08 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DRM DRIVER FOR MSM ADRENO GPU" , Bjorn Andersson , Sean Paul , open list , Brian Masney Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Check for errors instead of silently not using icc if the msm driver probes before the interconnect driver. Allow ENODATA for ocmem path, as it is optional and this error is returned when "gfx-mem" path is provided but not "ocmem". Because msm_gpu_cleanup assumes msm_gpu_init has been called, the icc path init needs to be after msm_gpu_init for the error path to work. v2: changed to not only check for EPROBE_DEFER v3: move icc path init after msm_gpu_init to avoid deleting a WARN_ON Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 65 +++++++++++++++---------- 1 file changed, 38 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 89673c7ed473..8ab75d7691bd 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -895,7 +895,7 @@ static int adreno_get_legacy_pwrlevels(struct device *dev) return 0; } -static int adreno_get_pwrlevels(struct device *dev, +static void adreno_get_pwrlevels(struct device *dev, struct msm_gpu *gpu) { unsigned long freq = ULONG_MAX; @@ -930,24 +930,6 @@ static int adreno_get_pwrlevels(struct device *dev, } DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate); - - /* Check for an interconnect path for the bus */ - gpu->icc_path = of_icc_get(dev, "gfx-mem"); - if (!gpu->icc_path) { - /* - * Keep compatbility with device trees that don't have an - * interconnect-names property. - */ - gpu->icc_path = of_icc_get(dev, NULL); - } - if (IS_ERR(gpu->icc_path)) - gpu->icc_path = NULL; - - gpu->ocmem_icc_path = of_icc_get(dev, "ocmem"); - if (IS_ERR(gpu->ocmem_icc_path)) - gpu->ocmem_icc_path = NULL; - - return 0; } int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu, @@ -993,9 +975,11 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, struct adreno_gpu *adreno_gpu, const struct adreno_gpu_funcs *funcs, int nr_rings) { - struct adreno_platform_config *config = pdev->dev.platform_data; + struct device *dev = &pdev->dev; + struct adreno_platform_config *config = dev->platform_data; struct msm_gpu_config adreno_gpu_config = { 0 }; struct msm_gpu *gpu = &adreno_gpu->base; + int ret; adreno_gpu->funcs = funcs; adreno_gpu->info = adreno_info(config->rev); @@ -1007,15 +991,42 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, adreno_gpu_config.nr_rings = nr_rings; - adreno_get_pwrlevels(&pdev->dev, gpu); + adreno_get_pwrlevels(dev, gpu); - pm_runtime_set_autosuspend_delay(&pdev->dev, + pm_runtime_set_autosuspend_delay(dev, adreno_gpu->info->inactive_period); - pm_runtime_use_autosuspend(&pdev->dev); - pm_runtime_enable(&pdev->dev); + pm_runtime_use_autosuspend(dev); + pm_runtime_enable(dev); - return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base, + ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base, adreno_gpu->info->name, &adreno_gpu_config); + if (ret) + return ret; + + /* Check for an interconnect path for the bus */ + gpu->icc_path = of_icc_get(dev, "gfx-mem"); + if (!gpu->icc_path) { + /* + * Keep compatbility with device trees that don't have an + * interconnect-names property. + */ + gpu->icc_path = of_icc_get(dev, NULL); + } + if (IS_ERR(gpu->icc_path)) { + ret = PTR_ERR(gpu->icc_path); + gpu->icc_path = NULL; + return ret; + } + + gpu->ocmem_icc_path = of_icc_get(dev, "ocmem"); + if (IS_ERR(gpu->ocmem_icc_path)) { + ret = PTR_ERR(gpu->ocmem_icc_path); + gpu->ocmem_icc_path = NULL; + /* allow -ENODATA, ocmem icc is optional */ + if (ret != -ENODATA) + return ret; + } + return 0; } void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu) @@ -1026,8 +1037,8 @@ void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu) for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++) release_firmware(adreno_gpu->fw[i]); + msm_gpu_cleanup(&adreno_gpu->base); + icc_put(gpu->icc_path); icc_put(gpu->ocmem_icc_path); - - msm_gpu_cleanup(&adreno_gpu->base); }