From patchwork Fri Aug 14 02:41:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11713449 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4A2D13B6 for ; Fri, 14 Aug 2020 02:42:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82B5320715 for ; Fri, 14 Aug 2020 02:42:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mGYvZ8LB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82B5320715 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E6D96EACF; Fri, 14 Aug 2020 02:42:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by gabe.freedesktop.org (Postfix) with ESMTPS id 01EA86EACF; Fri, 14 Aug 2020 02:42:18 +0000 (UTC) Received: by mail-pg1-x541.google.com with SMTP id d19so3810163pgl.10; Thu, 13 Aug 2020 19:42:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ORHfJz2e9TNUi11ClButtEprelkWs9RC+Iw7WuZZvQo=; b=mGYvZ8LB7tkBgR4ispTOOXDtmoDnJ0ENjIx7BCQ9VRkSut3GQfaIUYgdXpfYnGGuKg rZsPpm9wb26hYcXQcKc3aB74wVftPvCPcXGjyQqF7nWAXECSCmfltDB3BmeWGN2kkoXs osk+LRRkJPFsF9fxu+/EQaO4YaAY3IdnGgDhsDOf+f/ribXjeTndrgcxVJ+hQw2GGr4s ztbQqQ4tTlhOaV5EnPjL+S7x1AlsREgqkm4JjC+Z+NIk3/omRK3fVbdB1JyrWUgvd5gD v4n8h7JJxLJx2P8gvPi9gRw815etQEUjldg81O6PxszqQdmHHdHmD/LPuIKlK+3Y4RTT Optg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ORHfJz2e9TNUi11ClButtEprelkWs9RC+Iw7WuZZvQo=; b=TRjgX9yeyZHGh3tdspVkjlDUXgKWp4V1xewpk5mdkr9WI5EjdG5zrZWDShXcJqNyf7 Nulz9UPGgGdb8oqwa0J0iZQIVL1mLDpHdP8SNGDchhVhXHTVIRl6wfbKWOdmSTgLALrS D6EF56tCoc0mhRgzXXoVUfiXX2CIxSOQudszxLFlkEXrlTIFuTcSXpDVDuwG/A1oneim REItJpj/oiikAVFoQlAQgitXk846s9OsHKiM1MXKhFTVXlOjrVmvap/GnbT2zr/XLcJ+ bNXCC5a2CiGeypmfxupc0dRnnwp4iNsJLZzxHaVLzUAMu4rIAgZTyodZQU8gapqMpm6O 1Ubw== X-Gm-Message-State: AOAM532l8m2oIWRwDV1rZlovHpOM+qtJTnl44A5O3CpY/v8brYRs0BVB STkd5GRZs0hDI8V/+gKwPsEGk5GoHVf3Hw== X-Google-Smtp-Source: ABdhPJyR5WpqeE+88Qzfp41p5EbTBVgk+DjiD7KpYYcxsk9uoQzqZoh5cgFIQ2d/oEWKX5VXLHan3w== X-Received: by 2002:a65:6106:: with SMTP id z6mr390099pgu.310.1597372938297; Thu, 13 Aug 2020 19:42:18 -0700 (PDT) Received: from localhost ([2601:1c0:5200:a6:307:a401:7b76:c6e5]) by smtp.gmail.com with ESMTPSA id b63sm7201394pfg.43.2020.08.13.19.42.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 19:42:16 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 18/19] iommu/arm-smmu: add a way for implementations to influence SCTLR Date: Thu, 13 Aug 2020 19:41:13 -0700 Message-Id: <20200814024114.1177553-19-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200810222657.1841322-1-jcrouse@codeaurora.org> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Sai Prakash Ranjan , Thierry Reding , open list , Will Deacon , Joerg Roedel , Robin Murphy , Bjorn Andersson , Krishna Reddy , Sibi Sankar , Vivek Gautam , Greg Kroah-Hartman , Jon Hunter , Stephen Boyd , freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark For the Adreno GPU's SMMU, we want SCTLR.HUPCF set to ensure that pending translations are not terminated on iova fault. Otherwise a terminated CP read could hang the GPU by returning invalid command-stream data. Signed-off-by: Rob Clark Reviewed-by: Bjorn Andersson --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 6 ++++++ drivers/iommu/arm/arm-smmu/arm-smmu.c | 3 +++ drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 +++ 3 files changed, 12 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 5640d9960610..2aa6249050ff 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -127,6 +127,12 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain, (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64)) pgtbl_cfg->quirks |= IO_PGTABLE_QUIRK_ARM_TTBR1; + /* + * On the GPU device we want to process subsequent transactions after a + * fault to keep the GPU from hanging + */ + smmu_domain->cfg.sctlr_set |= ARM_SMMU_SCTLR_HUPCF; + /* * Initialize private interface with GPU: */ diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index e63a480d7f71..bbec5793faf8 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -617,6 +617,9 @@ void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) reg |= ARM_SMMU_SCTLR_E; + reg |= cfg->sctlr_set; + reg &= ~cfg->sctlr_clr; + arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index cd75a33967bb..2df3a70a8a41 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -144,6 +144,7 @@ enum arm_smmu_cbar_type { #define ARM_SMMU_CB_SCTLR 0x0 #define ARM_SMMU_SCTLR_S1_ASIDPNE BIT(12) #define ARM_SMMU_SCTLR_CFCFG BIT(7) +#define ARM_SMMU_SCTLR_HUPCF BIT(8) #define ARM_SMMU_SCTLR_CFIE BIT(6) #define ARM_SMMU_SCTLR_CFRE BIT(5) #define ARM_SMMU_SCTLR_E BIT(4) @@ -341,6 +342,8 @@ struct arm_smmu_cfg { u16 asid; u16 vmid; }; + u32 sctlr_set; /* extra bits to set in SCTLR */ + u32 sctlr_clr; /* bits to mask in SCTLR */ enum arm_smmu_cbar_type cbar; enum arm_smmu_context_fmt fmt; };