Message ID | 20200908151853.4837-6-narmstrong@baylibre.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/panfrost: add Amlogic integration quirks | expand |
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> > This adds the required GPU quirks, including the quirk in the PWR registers at the GPU > reset time and the IOMMU quirk for shareability issues observed on G52 in Amlogic G12B SoCs. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > drivers/gpu/drm/panfrost/panfrost_drv.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c > index 36463c89e966..efde5e2acc35 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_drv.c > +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c > @@ -656,7 +656,25 @@ static const struct panfrost_compatible default_data = { > .pm_domain_names = NULL, > }; > > +static const struct panfrost_compatible amlogic_gxm_data = { > + .num_supplies = ARRAY_SIZE(default_supplies), > + .supply_names = default_supplies, > + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, > +}; > + > +static const struct panfrost_compatible amlogic_g12a_data = { > + .num_supplies = ARRAY_SIZE(default_supplies), > + .supply_names = default_supplies, > + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, > + .pgtbl_quirks = IO_PGTABLE_QUIRK_ARM_BROKEN_SH, > +}; > + > static const struct of_device_id dt_match[] = { > + /* Set first to probe before the generic compatibles */ > + { .compatible = "amlogic,meson-gxm-mali", > + .data = &amlogic_gxm_data, }, > + { .compatible = "amlogic,meson-g12a-mali", > + .data = &amlogic_g12a_data, }, > { .compatible = "arm,mali-t604", .data = &default_data, }, > { .compatible = "arm,mali-t624", .data = &default_data, }, > { .compatible = "arm,mali-t628", .data = &default_data, }, > -- > 2.22.0 >
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 36463c89e966..efde5e2acc35 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -656,7 +656,25 @@ static const struct panfrost_compatible default_data = { .pm_domain_names = NULL, }; +static const struct panfrost_compatible amlogic_gxm_data = { + .num_supplies = ARRAY_SIZE(default_supplies), + .supply_names = default_supplies, + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, +}; + +static const struct panfrost_compatible amlogic_g12a_data = { + .num_supplies = ARRAY_SIZE(default_supplies), + .supply_names = default_supplies, + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, + .pgtbl_quirks = IO_PGTABLE_QUIRK_ARM_BROKEN_SH, +}; + static const struct of_device_id dt_match[] = { + /* Set first to probe before the generic compatibles */ + { .compatible = "amlogic,meson-gxm-mali", + .data = &amlogic_gxm_data, }, + { .compatible = "amlogic,meson-g12a-mali", + .data = &amlogic_g12a_data, }, { .compatible = "arm,mali-t604", .data = &default_data, }, { .compatible = "arm,mali-t624", .data = &default_data, }, { .compatible = "arm,mali-t628", .data = &default_data, },
This adds the required GPU quirks, including the quirk in the PWR registers at the GPU reset time and the IOMMU quirk for shareability issues observed on G52 in Amlogic G12B SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)