diff mbox series

[4/5] drm/msm/dpu: setup merge modes in merge_3d block

Message ID 20201022131658.181363-5-dmitry.baryshkov@linaro.org (mailing list archive)
State New, archived
Headers show
Series [1/5] drm/msm/dpu: simplify interface flush handling | expand

Commit Message

Dmitry Baryshkov Oct. 22, 2020, 1:16 p.m. UTC 
Handle setting up merge mode in merge_3d hardware block.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c    | 21 +++++++++++++++++++
 .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h    |  4 ++++
 2 files changed, 25 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
index 5c7ad19feea3..720813e5a8ae 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
@@ -11,6 +11,9 @@ 
 #include "dpu_kms.h"
 #include "dpu_trace.h"
 
+#define MERGE_3D_MUX  0x000
+#define MERGE_3D_MODE 0x004
+
 static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
 		const struct dpu_mdss_cfg *m,
 		void __iomem *addr,
@@ -32,9 +35,27 @@  static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
 	return ERR_PTR(-EINVAL);
 }
 
+static void dpu_hw_merge_3d_setup_3d_mode(struct dpu_hw_merge_3d *merge_3d,
+			enum dpu_3d_blend_mode mode_3d)
+{
+	struct dpu_hw_blk_reg_map *c;
+	u32 data;
+
+
+	c = &merge_3d->hw;
+	if (mode_3d == BLEND_3D_NONE) {
+		DPU_REG_WRITE(c, MERGE_3D_MODE, 0);
+		DPU_REG_WRITE(c, MERGE_3D_MUX, 0);
+	} else {
+		data = BIT(0) | ((mode_3d - 1) << 1);
+		DPU_REG_WRITE(c, MERGE_3D_MODE, data);
+	}
+}
+
 static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c,
 				unsigned long features)
 {
+	c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode;
 };
 
 static struct dpu_hw_blk_ops dpu_hw_ops;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h
index aaad7c90cfb0..870bdb14613e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h
@@ -16,8 +16,12 @@  struct dpu_hw_merge_3d;
  *
  * struct dpu_hw_merge_3d_ops : Interface to the merge_3d Hw driver functions
  *  Assumption is these functions will be called after clocks are enabled
+ *  @setup_3d_mode : enable 3D merge
  */
 struct dpu_hw_merge_3d_ops {
+	void (*setup_3d_mode)(struct dpu_hw_merge_3d *merge_3d,
+			enum dpu_3d_blend_mode mode_3d);
+
 };
 
 struct dpu_hw_merge_3d {