From patchwork Tue Nov 24 12:45:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 11928395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BA87C56201 for ; Tue, 24 Nov 2020 12:49:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A399A206B2 for ; Tue, 24 Nov 2020 12:49:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=ti.com header.i=@ti.com header.b="WcsCtJ39" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A399A206B2 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F281289932; Tue, 24 Nov 2020 12:49:46 +0000 (UTC) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by gabe.freedesktop.org (Postfix) with ESMTPS id 68BCA6E459 for ; Tue, 24 Nov 2020 12:49:12 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCn5MK124089; Tue, 24 Nov 2020 06:49:05 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1606222145; bh=lDXHzanxjxcn5NEEjBFLSPfycFKSFXzOB740p/zqUaM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WcsCtJ39J6Uu+gc2PQiVYTfKW3IZOR4klR6e+Vlw+AP5RA39Z+REBXBsfBB44t7sK LRcR5PZ2j6UQwTLqz8Bxxc00ERtoZgv3t2SpYWPpVYjfu12NSeC3HOH1Nugm4bSB1G glhYxN+KWljk4MHglwuZ64onkYMMkVgHdSfHkTeI= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AOCn5bx045864 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 24 Nov 2020 06:49:05 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 24 Nov 2020 06:49:04 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 24 Nov 2020 06:49:04 -0600 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AOCjmq9040922; Tue, 24 Nov 2020 06:49:02 -0600 From: Tomi Valkeinen To: Sebastian Reichel , Laurent Pinchart , Nikhil Devshatwar , , Subject: [PATCH v4 80/80] drm/omap: dsi: fix DCS_CMD_ENABLE Date: Tue, 24 Nov 2020 14:45:38 +0200 Message-ID: <20201124124538.660710-81-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201124124538.660710-1-tomi.valkeinen@ti.com> References: <20201124124538.660710-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tony Lindgren , hns@goldelico.com, Tomi Valkeinen , Sekhar Nori Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We only need to set VC_CTRL:DCS_CMD_ENABLE for command mode panels when the HW has DSI_QUIRK_DCS_CMD_CONFIG_VC quirk. The old code did this right by accident, but now we set DCS_CMD_ENABLE for video mode panels too. Fix this by skipping the set for video mode. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/dss/dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index ffecacd7350a..d52bef0c7aa2 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -3401,7 +3401,8 @@ static void dsi_setup_dsi_vcs(struct dsi_data *dsi) REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 1, 1); /* SOURCE_VP */ dsi->vc[VC_VIDEO].source = DSI_VC_SOURCE_VP; - if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) + if ((dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) && + !(dsi->dsidev->mode_flags & MIPI_DSI_MODE_VIDEO)) REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 30, 30); /* DCS_CMD_ENABLE */ dsi_vc_enable(dsi, VC_CMD, 1);