From patchwork Fri Nov 27 12:05:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 11935647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F1BAC63777 for ; Fri, 27 Nov 2020 12:09:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CEEAB21D81 for ; Fri, 27 Nov 2020 12:09:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CEEAB21D81 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 675226EC47; Fri, 27 Nov 2020 12:08:39 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 388A46EC43; Fri, 27 Nov 2020 12:08:31 +0000 (UTC) IronPort-SDR: CURefx4elYfj42xfGrRePdlYocoPlJZBo9pLi2yEO5+U3yvSFuat2oKa9fZBiUEjYJw5Djem9x yljYf9hHfSDQ== X-IronPort-AV: E=McAfee;i="6000,8403,9817"; a="168883454" X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="168883454" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 04:08:30 -0800 IronPort-SDR: jnyb2k6HwzG5P1PXvWcbow49fwA0H7ppXvXdnpk4eaE2xrkrhyGCEqOKWSOFJR0sBgX+A7ClBh 83c6W3BUGhKQ== X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="548028737" Received: from mjgleeso-mobl.ger.corp.intel.com (HELO mwauld-desk1.ger.corp.intel.com) ([10.251.85.2]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 04:08:28 -0800 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Subject: [RFC PATCH 035/162] drm/i915: Make intel_init_workaround_bb more compatible with ww locking. Date: Fri, 27 Nov 2020 12:05:11 +0000 Message-Id: <20201127120718.454037-36-matthew.auld@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201127120718.454037-1-matthew.auld@intel.com> References: <20201127120718.454037-1-matthew.auld@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniele Ceraolo Spurio , dri-devel@lists.freedesktop.org, =?utf-8?q?Thomas_Hellstr=C3=B6m?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Daniele Ceraolo Spurio Make creation separate from pinning, in order to take the lock only once, and pin the mapping with the lock held. Signed-off-by: Maarten Lankhorst Cc: Thomas Hellström Signed-off-by: Daniele Ceraolo Spurio --- .../drm/i915/gt/intel_engine_workaround_bb.c | 45 +++++++++++++++---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_workaround_bb.c b/drivers/gpu/drm/i915/gt/intel_engine_workaround_bb.c index b03bdfc92bb2..f3636b73cc10 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_workaround_bb.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_workaround_bb.c @@ -229,7 +229,7 @@ gen10_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch) #define CTX_WA_BB_OBJ_SIZE (PAGE_SIZE) -static int lrc_setup_wa_ctx(struct intel_engine_cs *engine) +static int lrc_init_wa_ctx(struct intel_engine_cs *engine) { struct drm_i915_gem_object *obj; struct i915_vma *vma; @@ -245,10 +245,6 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine) goto err; } - err = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH); - if (err) - goto err; - engine->wa_ctx.vma = vma; return 0; @@ -257,6 +253,18 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine) return err; } +static void lrc_destroy_wa_ctx(struct intel_engine_cs *engine, bool unpin) +{ + if (!engine->wa_ctx.vma) + return; + + if (unpin) + i915_vma_unpin(engine->wa_ctx.vma); + + i915_vma_put(engine->wa_ctx.vma); + engine->wa_ctx.vma = NULL; +} + typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch); int intel_init_workaround_bb(struct intel_engine_cs *engine) @@ -266,6 +274,7 @@ int intel_init_workaround_bb(struct intel_engine_cs *engine) &wa_ctx->per_ctx }; wa_bb_func_t wa_bb_fn[2]; void *batch, *batch_ptr; + struct i915_gem_ww_ctx ww; unsigned int i; int ret; @@ -293,13 +302,21 @@ int intel_init_workaround_bb(struct intel_engine_cs *engine) return 0; } - ret = lrc_setup_wa_ctx(engine); + ret = lrc_init_wa_ctx(engine); if (ret) { drm_dbg(&engine->i915->drm, "Failed to setup context WA page: %d\n", ret); return ret; } + i915_gem_ww_ctx_init(&ww, true); +retry: + ret = i915_gem_object_lock(wa_ctx->vma->obj, &ww); + if (!ret) + ret = i915_ggtt_pin(wa_ctx->vma, &ww, 0, PIN_HIGH); + if (ret) + goto err; + batch = i915_gem_object_pin_map(wa_ctx->vma->obj, I915_MAP_WB); /* @@ -323,13 +340,25 @@ int intel_init_workaround_bb(struct intel_engine_cs *engine) __i915_gem_object_flush_map(wa_ctx->vma->obj, 0, batch_ptr - batch); __i915_gem_object_release_map(wa_ctx->vma->obj); + + if (ret) + i915_vma_unpin(wa_ctx->vma); + +err: + if (ret == -EDEADLK) { + ret = i915_gem_ww_ctx_backoff(&ww); + if (!ret) + goto retry; + } + i915_gem_ww_ctx_fini(&ww); if (ret) - intel_fini_workaround_bb(engine); + lrc_destroy_wa_ctx(engine, false); return ret; } + void intel_fini_workaround_bb(struct intel_engine_cs *engine) { - i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0); + lrc_destroy_wa_ctx(engine, true); }