diff mbox series

[RFC,008/162] HAX drm/i915: Work around the selftest timeline lock splat workaround

Message ID 20201127120718.454037-9-matthew.auld@intel.com (mailing list archive)
State New, archived
Headers show
Series DG1 + LMEM enabling | expand

Commit Message

Matthew Auld Nov. 27, 2020, 12:04 p.m. UTC 
From: Thomas Hellström <thomas.hellstrom@intel.com>

There is a dirty hack to work around a lockdep splat because incorrect
ordering of selftest timeline lock against other locks. However, some
selftests recently started to use the same nesting level as the workaround
and thus introduced more splats. Add a workaround to the workaround making
some selftests aware of the workaround.

Signed-off-by: Thomas Hellström <thomas.hellstrom@intel.com>
Cc: Mattew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_context.c     |  3 ++-
 drivers/gpu/drm/i915/gt/intel_context.h     |  2 ++
 drivers/gpu/drm/i915/gt/selftest_timeline.c | 10 ++++++----
 3 files changed, 10 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index 349e7fa1488d..b63a8eb6c1a9 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -495,7 +495,8 @@  struct i915_request *intel_context_create_request(struct intel_context *ce)
 	 */
 	lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie);
 	mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_);
-	mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_);
+	mutex_acquire(&ce->timeline->mutex.dep_map, SELFTEST_WA_NESTING, 0,
+		      _RET_IP_);
 	rq->cookie = lockdep_pin_lock(&ce->timeline->mutex);
 
 	return rq;
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
index fda2eba81e22..175d505951c7 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -25,6 +25,8 @@ 
 		     ##__VA_ARGS__);					\
 } while (0)
 
+#define SELFTEST_WA_NESTING SINGLE_DEPTH_NESTING
+
 struct i915_gem_ww_ctx;
 
 void intel_context_init(struct intel_context *ce,
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index e4285d5a0360..fa3fec049542 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -688,7 +688,7 @@  static int live_hwsp_wrap(void *arg)
 
 		tl->seqno = -4u;
 
-		mutex_lock_nested(&tl->mutex, SINGLE_DEPTH_NESTING);
+		mutex_lock_nested(&tl->mutex, SELFTEST_WA_NESTING + 1);
 		err = intel_timeline_get_seqno(tl, rq, &seqno[0]);
 		mutex_unlock(&tl->mutex);
 		if (err) {
@@ -705,7 +705,7 @@  static int live_hwsp_wrap(void *arg)
 		}
 		hwsp_seqno[0] = tl->hwsp_seqno;
 
-		mutex_lock_nested(&tl->mutex, SINGLE_DEPTH_NESTING);
+		mutex_lock_nested(&tl->mutex, SELFTEST_WA_NESTING + 1);
 		err = intel_timeline_get_seqno(tl, rq, &seqno[1]);
 		mutex_unlock(&tl->mutex);
 		if (err) {
@@ -1037,7 +1037,8 @@  static int live_hwsp_read(void *arg)
 				goto out;
 			}
 
-			mutex_lock(&watcher[0].rq->context->timeline->mutex);
+			mutex_lock_nested(&watcher[0].rq->context->timeline->mutex,
+					  SELFTEST_WA_NESTING + 1);
 			err = intel_timeline_read_hwsp(rq, watcher[0].rq, &hwsp);
 			if (err == 0)
 				err = emit_read_hwsp(watcher[0].rq, /* before */
@@ -1050,7 +1051,8 @@  static int live_hwsp_read(void *arg)
 				goto out;
 			}
 
-			mutex_lock(&watcher[1].rq->context->timeline->mutex);
+			mutex_lock_nested(&watcher[1].rq->context->timeline->mutex,
+					  SELFTEST_WA_NESTING + 1);
 			err = intel_timeline_read_hwsp(rq, watcher[1].rq, &hwsp);
 			if (err == 0)
 				err = emit_read_hwsp(watcher[1].rq, /* after */