From patchwork Fri Nov 27 12:04:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 11935605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0958AC63777 for ; Fri, 27 Nov 2020 12:08:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E4AB21D81 for ; Fri, 27 Nov 2020 12:08:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E4AB21D81 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 686136EC23; Fri, 27 Nov 2020 12:08:04 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1FB6D6EBAC; Fri, 27 Nov 2020 12:07:51 +0000 (UTC) IronPort-SDR: fEIsyJq6HzfcFdc07qujEK1fRa1PwwHlAwMXEe6hWnaYSNH/8nYUXErLcshnfUd0VMdZqKnnjp U6DY1/tecZBg== X-IronPort-AV: E=McAfee;i="6000,8403,9817"; a="168883362" X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="168883362" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 04:07:41 -0800 IronPort-SDR: IHPrKCzsYoECsSQ55epZ2o/tiQOZcfzMR8IX9S8m54RcyskgymUVcckhRVCbCaLHXRoS6jTpsW y2f3tr8PoLVw== X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="548028544" Received: from mjgleeso-mobl.ger.corp.intel.com (HELO mwauld-desk1.ger.corp.intel.com) ([10.251.85.2]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 04:07:40 -0800 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Subject: [RFC PATCH 008/162] HAX drm/i915: Work around the selftest timeline lock splat workaround Date: Fri, 27 Nov 2020 12:04:44 +0000 Message-Id: <20201127120718.454037-9-matthew.auld@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201127120718.454037-1-matthew.auld@intel.com> References: <20201127120718.454037-1-matthew.auld@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Mattew Auld , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Thomas Hellström There is a dirty hack to work around a lockdep splat because incorrect ordering of selftest timeline lock against other locks. However, some selftests recently started to use the same nesting level as the workaround and thus introduced more splats. Add a workaround to the workaround making some selftests aware of the workaround. Signed-off-by: Thomas Hellström Cc: Mattew Auld --- drivers/gpu/drm/i915/gt/intel_context.c | 3 ++- drivers/gpu/drm/i915/gt/intel_context.h | 2 ++ drivers/gpu/drm/i915/gt/selftest_timeline.c | 10 ++++++---- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c index 349e7fa1488d..b63a8eb6c1a9 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.c +++ b/drivers/gpu/drm/i915/gt/intel_context.c @@ -495,7 +495,8 @@ struct i915_request *intel_context_create_request(struct intel_context *ce) */ lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie); mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_); - mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_); + mutex_acquire(&ce->timeline->mutex.dep_map, SELFTEST_WA_NESTING, 0, + _RET_IP_); rq->cookie = lockdep_pin_lock(&ce->timeline->mutex); return rq; diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h index fda2eba81e22..175d505951c7 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.h +++ b/drivers/gpu/drm/i915/gt/intel_context.h @@ -25,6 +25,8 @@ ##__VA_ARGS__); \ } while (0) +#define SELFTEST_WA_NESTING SINGLE_DEPTH_NESTING + struct i915_gem_ww_ctx; void intel_context_init(struct intel_context *ce, diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c index e4285d5a0360..fa3fec049542 100644 --- a/drivers/gpu/drm/i915/gt/selftest_timeline.c +++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c @@ -688,7 +688,7 @@ static int live_hwsp_wrap(void *arg) tl->seqno = -4u; - mutex_lock_nested(&tl->mutex, SINGLE_DEPTH_NESTING); + mutex_lock_nested(&tl->mutex, SELFTEST_WA_NESTING + 1); err = intel_timeline_get_seqno(tl, rq, &seqno[0]); mutex_unlock(&tl->mutex); if (err) { @@ -705,7 +705,7 @@ static int live_hwsp_wrap(void *arg) } hwsp_seqno[0] = tl->hwsp_seqno; - mutex_lock_nested(&tl->mutex, SINGLE_DEPTH_NESTING); + mutex_lock_nested(&tl->mutex, SELFTEST_WA_NESTING + 1); err = intel_timeline_get_seqno(tl, rq, &seqno[1]); mutex_unlock(&tl->mutex); if (err) { @@ -1037,7 +1037,8 @@ static int live_hwsp_read(void *arg) goto out; } - mutex_lock(&watcher[0].rq->context->timeline->mutex); + mutex_lock_nested(&watcher[0].rq->context->timeline->mutex, + SELFTEST_WA_NESTING + 1); err = intel_timeline_read_hwsp(rq, watcher[0].rq, &hwsp); if (err == 0) err = emit_read_hwsp(watcher[0].rq, /* before */ @@ -1050,7 +1051,8 @@ static int live_hwsp_read(void *arg) goto out; } - mutex_lock(&watcher[1].rq->context->timeline->mutex); + mutex_lock_nested(&watcher[1].rq->context->timeline->mutex, + SELFTEST_WA_NESTING + 1); err = intel_timeline_read_hwsp(rq, watcher[1].rq, &hwsp); if (err == 0) err = emit_read_hwsp(watcher[1].rq, /* after */