From patchwork Tue Dec 8 07:51:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 11957841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EBBDC4361B for ; Tue, 8 Dec 2020 07:58:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D252123A51 for ; Tue, 8 Dec 2020 07:58:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D252123A51 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC8216E94F; Tue, 8 Dec 2020 07:58:06 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 329046E94E; Tue, 8 Dec 2020 07:58:05 +0000 (UTC) IronPort-SDR: hlCEDMC44i4xc1R29DAbrJk3nHZ9gmoTyok2tOQii+mXeL88En0Prqu+E9G6y662/SAYY3gO1p 0tO+QZXHOlHA== X-IronPort-AV: E=McAfee;i="6000,8403,9828"; a="235448631" X-IronPort-AV: E=Sophos;i="5.78,401,1599548400"; d="scan'208";a="235448631" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2020 23:58:04 -0800 IronPort-SDR: 3s1XTdKezVhPOFXPWfpCWdU52GO+IdSy92ZcSUx5vswvBt+s/kTI4keofzKgTO+9cTaI6gI8Ko uOxuIm2wlMZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,401,1599548400"; d="scan'208";a="317686428" Received: from linux-akn.iind.intel.com ([10.223.34.148]) by fmsmga008.fm.intel.com with ESMTP; 07 Dec 2020 23:58:02 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Subject: [PATCH v4 01/16] drm/edid: Add additional HFVSDB fields for HDMI2.1 Date: Tue, 8 Dec 2020 13:21:30 +0530 Message-Id: <20201208075145.17389-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201208075145.17389-1-ankit.k.nautiyal@intel.com> References: <20201208075145.17389-1-ankit.k.nautiyal@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: swati2.sharma@intel.com, airlied@linux.ie, vandita.kulkarni@intel.com, uma.shankar@intel.com, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Swati Sharma The HDMI2.1 extends HFVSDB (HDMI Forum Vendor Specific Data block) to have fields related to newly defined methods of FRL (Fixed Rate Link) levels, number of lanes supported, DSC Color bit depth, VRR min/max, FVA (Fast Vactive), ALLM etc. This patch adds the new HFVSDB fields that are required for HDMI2.1. v2: Minor fixes + consistent naming for DPCD register masks (Uma Shankar) Signed-off-by: Sharma, Swati2 Signed-off-by: Ankit Nautiyal Reviewed-by: Uma Shankar --- include/drm/drm_edid.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index e97daf6ffbb1..a158f585f658 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -229,6 +229,36 @@ struct detailed_timing { DRM_EDID_YCBCR420_DC_36 | \ DRM_EDID_YCBCR420_DC_30) +/* HDMI 2.1 additional fields */ +#define DRM_EDID_MAX_FRL_RATE_MASK 0xf0 +#define DRM_EDID_FAPA_START_LOCATION (1 << 0) +#define DRM_EDID_ALLM (1 << 1) +#define DRM_EDID_FVA (1 << 2) + +/* Deep Color specific */ +#define DRM_EDID_DC_30BIT_420 (1 << 0) +#define DRM_EDID_DC_36BIT_420 (1 << 1) +#define DRM_EDID_DC_48BIT_420 (1 << 2) + +/* VRR specific */ +#define DRM_EDID_CNMVRR (1 << 3) +#define DRM_EDID_CINEMA_VRR (1 << 4) +#define DRM_EDID_MDELTA (1 << 5) +#define DRM_EDID_VRR_MAX_UPPER_MASK 0xc0 +#define DRM_EDID_VRR_MAX_LOWER_MASK 0xff +#define DRM_EDID_VRR_MIN_MASK 0x3f + +/* DSC specific */ +#define DRM_EDID_DSC_10BPC (1 << 0) +#define DRM_EDID_DSC_12BPC (1 << 1) +#define DRM_EDID_DSC_16BPC (1 << 2) +#define DRM_EDID_DSC_ALL_BPP (1 << 3) +#define DRM_EDID_DSC_NATIVE_420 (1 << 6) +#define DRM_EDID_DSC_1P2 (1 << 7) +#define DRM_EDID_DSC_MAX_FRL_RATE_MASK 0xf0 +#define DRM_EDID_DSC_MAX_SLICES 0xf +#define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f + /* ELD Header Block */ #define DRM_ELD_HEADER_BLOCK_SIZE 4