| Message ID | 20210203231537.77851-1-konrad.dybcio@somainline.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk | expand |
On 2021-02-03 15:15, Konrad Dybcio wrote: > The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> > --- > drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c > b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c > index dfffd9cf0613..bd07d2e1ad90 100644 > --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c > +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c > @@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = > { > [3] = INTF_HDMI, > }, > }, > - .max_clk = 200000000, > + .max_clk = 320000000, > }; > > static const struct mdp5_cfg_hw apq8084_config = {
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c index dfffd9cf0613..bd07d2e1ad90 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c @@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = { [3] = INTF_HDMI, }, }, - .max_clk = 200000000, + .max_clk = 320000000, }; static const struct mdp5_cfg_hw apq8084_config = {
The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)