Message ID | 20210217025337.1929015-2-lyude@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v3,1/2] drm/i915/gen9bc: Handle TGP PCH during suspend/resume | expand |
On Tue, Feb 16, 2021 at 09:53:37PM -0500, Lyude Paul wrote: > While reviewing patches for handling workarounds related to gen9 bc, Imre > from Intel discovered that we're using spt_hpd_irq_setup() on ICP+ PCHs > despite it being almost the same as icp_hpd_irq_setup(). Since we need to > be calling icp_hpd_irq_setup() to ensure that CML-S/TGP platforms function > correctly anyway, let's move platforms using PCH_ICP which aren't handled > by gen11_hpd_irq_setup() over to icp_hpd_irq_setup(). > > Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> > Signed-off-by: Lyude Paul <lyude@redhat.com> makes sense to me... Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/i915_irq.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index f86b147f588f..7ec61187a315 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -4320,6 +4320,8 @@ void intel_irq_init(struct drm_i915_private *dev_priv) > dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup; > else if (IS_GEN9_LP(dev_priv)) > dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup; > + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) > + dev_priv->display.hpd_irq_setup = icp_hpd_irq_setup; > else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT) > dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup; > else > -- > 2.29.2 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f86b147f588f..7ec61187a315 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -4320,6 +4320,8 @@ void intel_irq_init(struct drm_i915_private *dev_priv) dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup; else if (IS_GEN9_LP(dev_priv)) dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup; + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) + dev_priv->display.hpd_irq_setup = icp_hpd_irq_setup; else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT) dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup; else
While reviewing patches for handling workarounds related to gen9 bc, Imre from Intel discovered that we're using spt_hpd_irq_setup() on ICP+ PCHs despite it being almost the same as icp_hpd_irq_setup(). Since we need to be calling icp_hpd_irq_setup() to ensure that CML-S/TGP platforms function correctly anyway, let's move platforms using PCH_ICP which aren't handled by gen11_hpd_irq_setup() over to icp_hpd_irq_setup(). Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Signed-off-by: Lyude Paul <lyude@redhat.com> --- drivers/gpu/drm/i915/i915_irq.c | 2 ++ 1 file changed, 2 insertions(+)