| Message ID | 20210309043915.1921-4-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | HDMI2.1 PCON Misc Fixes | expand |
> -----Original Message----- > From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com> > Sent: Tuesday, March 9, 2021 10:09 AM > To: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Shankar, Uma > <uma.shankar@intel.com>; airlied@linux.ie; jani.nikula@linux.intel.com > Subject: [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if > Src-Ctl mode is available > > Currently we see only the MAX FRL BW from PCON before going for FRL. > Also add the check if source control mode is supported by the PCON, before starting > configuring PCON for FRL training. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 2e90359ce21f..8e401d3fd29d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2638,7 +2638,8 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp) > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > > /* Always go for FRL training if supported */ > - if (!intel_dp_is_hdmi_2_1_sink(intel_dp) || > + if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) || Would be good to add spec reference as well here. With that added, this is Reviewed-by: Uma Shankar <uma.shankar@intel.com> > + !intel_dp_is_hdmi_2_1_sink(intel_dp) || > intel_dp->frl.is_trained) > return; > > -- > 2.29.2
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2e90359ce21f..8e401d3fd29d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2638,7 +2638,8 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); /* Always go for FRL training if supported */ - if (!intel_dp_is_hdmi_2_1_sink(intel_dp) || + if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) || + !intel_dp_is_hdmi_2_1_sink(intel_dp) || intel_dp->frl.is_trained) return;
Currently we see only the MAX FRL BW from PCON before going for FRL. Also add the check if source control mode is supported by the PCON, before starting configuring PCON for FRL training. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)