Message ID | 20210423190833.25319-3-jonathan@marek.ca (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/msm: add MSM_BO_CACHED_COHERENT (and related changes) | expand |
On Fri, Apr 23, 2021 at 03:08:18PM -0400, Jonathan Marek wrote: > msm_gem_get_vaddr() currently always maps as writecombine, so use the right > flag instead of relying on broken behavior (things don't actually work if > they are mapped as uncached). Ugh - I can't believe this was stil in there. Acked-by: Jordan Crouse <jordan@cosmicpenguin.net> > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++-- > drivers/gpu/drm/msm/adreno/a5xx_power.c | 2 +- > drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 4 ++-- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- > 7 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index ce13d49e615b..eb0f884eaf30 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -902,7 +902,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) > if (!a5xx_gpu->shadow_bo) { > a5xx_gpu->shadow = msm_gem_kernel_new(gpu->dev, > sizeof(u32) * gpu->nr_rings, > - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, > + MSM_BO_WC | MSM_BO_MAP_PRIV, > gpu->aspace, &a5xx_gpu->shadow_bo, > &a5xx_gpu->shadow_iova); > > @@ -1407,7 +1407,7 @@ static int a5xx_crashdumper_init(struct msm_gpu *gpu, > struct a5xx_crashdumper *dumper) > { > dumper->ptr = msm_gem_kernel_new_locked(gpu->dev, > - SZ_1M, MSM_BO_UNCACHED, gpu->aspace, > + SZ_1M, MSM_BO_WC, gpu->aspace, > &dumper->bo, &dumper->iova); > > if (!IS_ERR(dumper->ptr)) > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c > index c35b06b46fcc..cdb165236a88 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c > @@ -363,7 +363,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) > bosize = (cmds_size + (cmds_size / TYPE4_MAX_PAYLOAD) + 1) << 2; > > ptr = msm_gem_kernel_new_locked(drm, bosize, > - MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, > + MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, > &a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova); > if (IS_ERR(ptr)) > return; > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c > index 42eaef7ad7c7..ee72510ff8ce 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c > @@ -230,7 +230,7 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, > > ptr = msm_gem_kernel_new(gpu->dev, > A5XX_PREEMPT_RECORD_SIZE + A5XX_PREEMPT_COUNTER_SIZE, > - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); > + MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); > > if (IS_ERR(ptr)) > return PTR_ERR(ptr); > @@ -238,7 +238,7 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, > /* The buffer to store counters needs to be unprivileged */ > counters = msm_gem_kernel_new(gpu->dev, > A5XX_PREEMPT_COUNTER_SIZE, > - MSM_BO_UNCACHED, gpu->aspace, &counters_bo, &counters_iova); > + MSM_BO_WC, gpu->aspace, &counters_bo, &counters_iova); > if (IS_ERR(counters)) { > msm_gem_kernel_put(bo, gpu->aspace, true); > return PTR_ERR(counters); > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 5214a15db95f..1716984c68a8 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -852,7 +852,7 @@ static int a6xx_hw_init(struct msm_gpu *gpu) > if (!a6xx_gpu->shadow_bo) { > a6xx_gpu->shadow = msm_gem_kernel_new_locked(gpu->dev, > sizeof(u32) * gpu->nr_rings, > - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, > + MSM_BO_WC | MSM_BO_MAP_PRIV, > gpu->aspace, &a6xx_gpu->shadow_bo, > &a6xx_gpu->shadow_iova); > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > index c1699b4f9a89..21c49c5b4519 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c > @@ -113,7 +113,7 @@ static int a6xx_crashdumper_init(struct msm_gpu *gpu, > struct a6xx_crashdumper *dumper) > { > dumper->ptr = msm_gem_kernel_new_locked(gpu->dev, > - SZ_1M, MSM_BO_UNCACHED, gpu->aspace, > + SZ_1M, MSM_BO_WC, gpu->aspace, > &dumper->bo, &dumper->iova); > > if (!IS_ERR(dumper->ptr)) > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index 17f3e45fd5ff..c1332b2459ec 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -391,7 +391,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, > void *ptr; > > ptr = msm_gem_kernel_new_locked(gpu->dev, fw->size - 4, > - MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova); > + MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova); > > if (IS_ERR(ptr)) > return ERR_CAST(ptr); > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index 055cd1c7c9fe..18c80744e331 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -1155,7 +1155,7 @@ int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size) > uint64_t iova; > u8 *data; > > - data = msm_gem_kernel_new(dev, size, MSM_BO_UNCACHED, > + data = msm_gem_kernel_new(dev, size, MSM_BO_WC, > priv->kms->aspace, > &msm_host->tx_gem_obj, &iova); > > -- > 2.26.1 >
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index ce13d49e615b..eb0f884eaf30 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -902,7 +902,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) if (!a5xx_gpu->shadow_bo) { a5xx_gpu->shadow = msm_gem_kernel_new(gpu->dev, sizeof(u32) * gpu->nr_rings, - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, + MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &a5xx_gpu->shadow_bo, &a5xx_gpu->shadow_iova); @@ -1407,7 +1407,7 @@ static int a5xx_crashdumper_init(struct msm_gpu *gpu, struct a5xx_crashdumper *dumper) { dumper->ptr = msm_gem_kernel_new_locked(gpu->dev, - SZ_1M, MSM_BO_UNCACHED, gpu->aspace, + SZ_1M, MSM_BO_WC, gpu->aspace, &dumper->bo, &dumper->iova); if (!IS_ERR(dumper->ptr)) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c index c35b06b46fcc..cdb165236a88 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c @@ -363,7 +363,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) bosize = (cmds_size + (cmds_size / TYPE4_MAX_PAYLOAD) + 1) << 2; ptr = msm_gem_kernel_new_locked(drm, bosize, - MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, + MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova); if (IS_ERR(ptr)) return; diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c index 42eaef7ad7c7..ee72510ff8ce 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c @@ -230,7 +230,7 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, ptr = msm_gem_kernel_new(gpu->dev, A5XX_PREEMPT_RECORD_SIZE + A5XX_PREEMPT_COUNTER_SIZE, - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); + MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); if (IS_ERR(ptr)) return PTR_ERR(ptr); @@ -238,7 +238,7 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, /* The buffer to store counters needs to be unprivileged */ counters = msm_gem_kernel_new(gpu->dev, A5XX_PREEMPT_COUNTER_SIZE, - MSM_BO_UNCACHED, gpu->aspace, &counters_bo, &counters_iova); + MSM_BO_WC, gpu->aspace, &counters_bo, &counters_iova); if (IS_ERR(counters)) { msm_gem_kernel_put(bo, gpu->aspace, true); return PTR_ERR(counters); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 5214a15db95f..1716984c68a8 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -852,7 +852,7 @@ static int a6xx_hw_init(struct msm_gpu *gpu) if (!a6xx_gpu->shadow_bo) { a6xx_gpu->shadow = msm_gem_kernel_new_locked(gpu->dev, sizeof(u32) * gpu->nr_rings, - MSM_BO_UNCACHED | MSM_BO_MAP_PRIV, + MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &a6xx_gpu->shadow_bo, &a6xx_gpu->shadow_iova); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c index c1699b4f9a89..21c49c5b4519 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c @@ -113,7 +113,7 @@ static int a6xx_crashdumper_init(struct msm_gpu *gpu, struct a6xx_crashdumper *dumper) { dumper->ptr = msm_gem_kernel_new_locked(gpu->dev, - SZ_1M, MSM_BO_UNCACHED, gpu->aspace, + SZ_1M, MSM_BO_WC, gpu->aspace, &dumper->bo, &dumper->iova); if (!IS_ERR(dumper->ptr)) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 17f3e45fd5ff..c1332b2459ec 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -391,7 +391,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, void *ptr; ptr = msm_gem_kernel_new_locked(gpu->dev, fw->size - 4, - MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova); + MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova); if (IS_ERR(ptr)) return ERR_CAST(ptr); diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 055cd1c7c9fe..18c80744e331 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1155,7 +1155,7 @@ int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size) uint64_t iova; u8 *data; - data = msm_gem_kernel_new(dev, size, MSM_BO_UNCACHED, + data = msm_gem_kernel_new(dev, size, MSM_BO_WC, priv->kms->aspace, &msm_host->tx_gem_obj, &iova);
msm_gem_get_vaddr() currently always maps as writecombine, so use the right flag instead of relying on broken behavior (things don't actually work if they are mapped as uncached). Signed-off-by: Jonathan Marek <jonathan@marek.ca> --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/a5xx_power.c | 2 +- drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 4 ++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-)