From patchwork Mon Jun 14 22:17:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12320653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E70FC48BDF for ; Tue, 15 Jun 2021 05:52:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 44D9560720 for ; Tue, 15 Jun 2021 05:52:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 44D9560720 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 70D9C89F73; Tue, 15 Jun 2021 05:52:37 +0000 (UTC) X-Greylist: delayed 504 seconds by postgrey-1.36 at gabe; Mon, 14 Jun 2021 22:26:30 UTC Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9A5F89C68; Mon, 14 Jun 2021 22:26:30 +0000 (UTC) Received: from mwalle01.fritz.box (ip4d17858c.dynamic.kabel-deutschland.de [77.23.133.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id B1F9422253; Tue, 15 Jun 2021 00:18:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1623709086; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SD9ah05R7q3Xl2JjUIPjpWWyqe3h4fOAzvP8iSEX2Hk=; b=U5MJr1VkoyQo1vU0kwB7yeUkXd4RKn9ihxT/uFlNjhcvsaeKUaKQOJRfUzZq4MRC1rtC9K 4/WWfmg1EKlDcpzjk0xc2OQteI1TSsFCbIDZ2/d0J2rIKVDuo1I0/UmzFZ+vqJg+9y9oW2 vNLQ0t/aBNfCsswPMXGlbJAQ5Ti5h3E= From: Michael Walle To: etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 2/2] drm/etnaviv: add clock gating workaround for GC7000 r6202 Date: Tue, 15 Jun 2021 00:17:52 +0200 Message-Id: <20210614221752.1251-3-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210614221752.1251-1-michael@walle.cc> References: <20210614221752.1251-1-michael@walle.cc> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 15 Jun 2021 05:52:29 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , Michael Walle , Russell King Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The LS1028A SoC errata sheet mentions A-050121 "GPU hangs if clock gating for Rasterizer, Setup Engine and Texture Engine are enabled". The workaround is to disable the corresponding clock gatings. Signed-off-by: Michael Walle --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 4102bcea3341..574e4e04dddc 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -613,6 +613,12 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) etnaviv_is_model_rev(gpu, GC2000, 0x5108)) pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX; + /* Disable RS, SE, TE clock gating on affected core revisions. */ + if (etnaviv_is_model_rev(gpu, GC7000, 0x6202)) + pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE | + VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA | + VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX; + pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ; pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;