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dkim=none (message not signed) header.d=none; lists.freedesktop.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5136.namprd12.prod.outlook.com (2603:10b6:5:393::23) by DM4PR12MB5341.namprd12.prod.outlook.com (2603:10b6:5:39e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.19; Tue, 29 Jun 2021 07:36:49 +0000 Received: from DM4PR12MB5136.namprd12.prod.outlook.com ([fe80::901b:72bb:a15:2a68]) by DM4PR12MB5136.namprd12.prod.outlook.com ([fe80::901b:72bb:a15:2a68%4]) with mapi id 15.20.4264.026; Tue, 29 Jun 2021 07:36:48 +0000 From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/2] drm/amdgpu: raise error on incorrect mem_type Date: Tue, 29 Jun 2021 09:36:29 +0200 Message-Id: <20210629073629.3069-2-nirmoy.das@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210629073629.3069-1-nirmoy.das@amd.com> References: <20210629073629.3069-1-nirmoy.das@amd.com> X-Originating-IP: [217.86.118.245] X-ClientProxiedBy: PR3P189CA0009.EURP189.PROD.OUTLOOK.COM (2603:10a6:102:52::14) To DM4PR12MB5136.namprd12.prod.outlook.com (2603:10b6:5:393::23) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from brihaspati.fritz.box (217.86.118.245) by PR3P189CA0009.EURP189.PROD.OUTLOOK.COM (2603:10a6:102:52::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.18 via Frontend Transport; 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Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c index 543000304a1c..0b0fa87b115c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c @@ -107,8 +107,12 @@ const struct attribute_group amdgpu_gtt_mgr_attr_group = { */ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res) { - struct amdgpu_gtt_node *node = to_amdgpu_gtt_node(res); + struct amdgpu_gtt_node *node; + + if (WARN_ON(res->mem_type != TTM_PL_TT)) + return false; + node = to_amdgpu_gtt_node(res); return drm_mm_node_allocated(&node->base.mm_nodes[0]); }