| Message ID | 20210722094551.15255-4-nancy.lin@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek SoC DRM (vdosys1) support for mt8195 | expand |
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index e6cd6e2173d4..480194c20adf 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -87,6 +87,9 @@ properties: The available clocks are defined in dt-bindings/clock/mt*-clk.h const: 1 + "#reset-cells": + const: 1 + mboxes: description: | Client use mailbox to communicate with GCE, it should have this
The mmsys system controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 3 +++ 1 file changed, 3 insertions(+)